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SH7018 Datasheet(PDF) 304 Page - Renesas Technology Corp |
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SH7018 Datasheet(HTML) 304 Page - Renesas Technology Corp |
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304 / 431 page ![]() 288 14.3.3 Port B IO Register (PBIOR) The port B IO register (PBIOR) is a 16-bit readable/writable register that selects the input/output direction of the pins in port B. The bits of this register correspond to the various pins. PBIOR is enabled when the port B pins function as general input/output (PB9 to PB0) pins, and disabled otherwise. When the port B pins function as PB9 to PB0, a pin becomes an output when the corresponding bit in PBIOR is set to 1, and an input when the bit is cleared to 0. PBIOR is initialized to H'0000 by an external power-on reset. However, it is not initialized by a WDT reset, in standby mode, or in sleep mode. In these cases it retains its previous data. Bit: 15 14 13 12 11 10 9 8 — — — — — — PB9IOR PB8IOR Initial value: 0 0 0 0 0 0 0 0 R/W: R R R R R R R/W R/W Bit: 7 6 5 4 3 2 1 0 PB7IOR PB6IOR PB5IOR PB4IOR PB3IOR PB2IOR PB1IOR PB0IOR Initial value: 0 0 0 0 0 0 0 0 R/W: R/W R/W R/W R/W R/W R/W R/W R/W 14.3.4 Port B Control Registers 1 and 2 (PVCR1, PBCR2) Port B control registers 1 and 2 (PVCR1, PBCR2) are 16-bit readable/writable registers that select the functions of the pins in port B. PVCR1 and PBCR2 are each initialized to H'0000 by an external power-on reset. However, they are not initialized by a WDT reset, in standby mode, or in sleep mode. In these cases they retain their previous data. |
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