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SH7052 Datasheet(PDF) 600 Page - Renesas Technology Corp |
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SH7052 Datasheet(HTML) 600 Page - Renesas Technology Corp |
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600 / 919 page  574 When the ADCS bit is cleared to 0, selecting scanning of all channels within the group (AN12 to AN15), conversion is performed continuously, once only for each channel within the group, and operation stops on completion of conversion for the last (highest-numbered) channel. For details of the operation in single mode and scan mode, see section 16.4, Operation. • Bits 3 to 0—Channel Select 3 to 0 (CH3 to CH0): These bits, together with the ADM1 and ADM0 bits, select the analog input channels. To prevent incorrect operation, ensure that the ADST bit in A/D control register 1 (ADCR1) is cleared to 0 before changing the analog input channel selection. Analog Input Channels Bit: Bit: Bit: Bit: Single Mode 4-Channel Scan Mode CH3 CH2 CH1 CH0 A/D1 A/D1 0* 1 0* 1 0 0 AN12 (Initial value) AN12 1 AN13 AN12, AN13 1 0 AN14 AN12 to AN14 1 AN15 AN12 to AN15 Notes 1. These bits must be set to 0. 2. Other modes, which are not described in this table are, for future use. Be sure not to use the modes. |
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