SH7052 datasheet(246/919 Pages) RENESAS

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• Bits 7 and 6—I/O Control 0D1 and 0D0 (IO0D1, IO0D0): These bits select TIOD pin input

capture signal edge detection.

Bit 7: IO0D1

Bit 6: IO0D0

Description

Input capture disabled (input capture possible in TCNT10B

compare-match)

(Initial value)

Input capture in ICR0D on rising edge

Input capture in ICR0D on falling edge

Input capture in ICR0D on both rising and falling edges

• Bits 5 and 4—I/O Control 0C1 and 0C0 (IO0C1, IO0C0): These bits select TIOC pin input

capture signal edge detection.

Bit 5: IO0C1

Bit 4: IO0C0

Description

Input capture disabled

(Initial value)

Input capture in ICR0C on rising edge

Input capture in ICR0C on falling edge

Input capture in ICR0C on both rising and falling edges

• Bits 3 and 2—I/O Control 0B1 and 0B0 (IO0B1, IO0B0): These bits select TIOB pin input

capture signal edge detection.

Bit 3: IO0B1

Bit 2: IO0B0

Description

Input capture disabled

(Initial value)

Input capture in ICR0B on rising edge

Input capture in ICR0B on falling edge

Input capture in ICR0B on both rising and falling edges

• Bits 1 and 0—I/O Control 0A1 and 0A0 (IO0A1, IO0A0): These bits select TIOA pin input

capture signal edge detection.

Bit 1: IO0A1

Bit 0: IO0A0

Description

Input capture disabled

(Initial value)

Input capture in ICR0A on rising edge

Input capture in ICR0A on falling edge

Input capture in ICR0A on both rising and falling edges

SH7052 Datasheet(PDF) 246 Page - Renesas Technology Corp

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