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SH7052 Datasheet(PDF) 248 Page - Renesas Technology Corp |
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SH7052 Datasheet(HTML) 248 Page - Renesas Technology Corp |
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248 / 919 page  222 • Bits 6 to 4—I/O Control 1B2 to 1B0, 1D2 to 1D0, 1F2 to 1F0, 1H2 to 1H0 (IO1B2 to IO1B0, IO1D2 to IO1D0, IOF12 to IO1F0, IO1H2 to IO1H0): These bits select the general register (GR) function. Bit 6: IO1x2 Bit 5: IO1x1 Bit 4: IO1x0 Description 0 0 0 GR is an output compare register Compare-match disabled; pin output undefined (Initial value) 1 0 output on GR compare-match 1 0 1 output on GR compare-match 1 Toggle output on GR compare-match 1 0 0 GR is an input capture register Input capture disabled (GR cannot be written to) 1 Input capture in GR on rising edge at TIO1x pin (GR cannot be written to) 1 0 Input capture in GR on falling edge at TIO1x pin (GR cannot be written to) 1 Input capture in GR on both rising and falling edges at TIO1x pin (GR cannot be written to) x = B, D, F, or H • Bit 3—Reserved: This bit always reads 0. The write value should always be 0. |
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