SH7052 datasheet(252/919 Pages) RENESAS

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• Bits 2 to 0—I/O Control 2A2 to 2A0, 2C2 to 2C0, 2E2 to 2E0, 2G2 to 2G0 (IO2A2 to IO2A0,

IO2C2 to IO2C0, IO2E2 to IO2E0, IO2G2 to IO2G0): These bits select the general register

(GR) function.

Bit 2:

IO2x2

Bit 1:

IO2x1

Bit 0:

IO2x0

Description

GR is an output

compare register

Compare-match disabled; pin output

undefined

(Initial value)

0 output on GR compare-match

1 output on GR compare-match

Toggle output on GR compare-match

GR is an input

capture register

Input capture disabled

Input capture in GR on rising edge at

TIO2x pin (GR cannot be written to)

Input capture in GR on falling edge at

TIO2x pin (GR cannot be written to)

Input capture in GR on both rising and

falling edges at TIO2x pin (GR cannot be

written to)

x = A, C, E, or G

Timer I/O Control Registers 3A, 3B, 4A, 4B, 5A, 5B

(TIOR3A, TIOR3B, TIOR4A, TIOR4B, TIOR5A, TIOR5B)

TIOR3A, TIOR4A, TIOR5A

Bit:

CCIxB

IOxB2

IOxB1

IOxB0

CCIxA

IOxA2

IOxA1

IOxA0

Initial value:

R/W:

R/W

x = 3 to 5

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