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SH7052 Datasheet(PDF) 249 Page - Renesas Technology Corp |
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SH7052 Datasheet(HTML) 249 Page - Renesas Technology Corp |
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249 / 919 page  223 • Bits 2 to 0—I/O Control 1A2 to 1A0, 1C2 to 1C0, 1E2 to 1E0, 1G2 to 1G0 (IO1A2 to IO1A0, IO1C2 to IO1C0, IO1E2 to IO1E0, IO1G2 to IO1G0): These bits select the general register (GR) function. Bit 2: IO1x2 Bit 1: IO1x1 Bit 0: IO1x0 Description 0 0 0 GR is an output compare register Compare-match disabled; pin output undefined (Initial value) 1 0 output on GR compare-match 1 0 1 output on GR compare-match 1 Toggle output on GR compare-match 1 0 0 GR is an input capture register Input capture disabled (GR cannot be written to) 1 Input capture in GR on rising edge at TIO1x pin (GR cannot be written to) 1 0 Input capture in GR on falling edge at TIO1x pin (GR cannot be written to) 1 Input capture in GR on both rising and falling edges at TIO1x pin (GR cannot be written to) |
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