SH7243 datasheet(285/1726 Pages) RENESAS

285 / 1726 page

Section 9 Bus State Controller (BSC)

Rev. 1.00 Jun. 26, 2008 Page 255 of 1692

REJ09B0393-0100

9.4

The BSC has the following registers.

Do not access spaces other than area 0 until settings of the connected memory interface are

completed.

Table 9.4

Abbreviation

R/W

Initial Value

Address

Access Size

Common control register

CMNCR

R/W

H'00001010

H'FFFC0000

CSn space bus control register

CSnBCR

R/W

H'36DB0400*

H'FFFC 0004 to

H'FFFC 0020

CSn space wait control register

CSnWCR

R/W

H'00000500

H'FFFC0028 to

H'FFFC 0044

SDRAM control register

SDCR

R/W

H'00000000

H'FFFC004C

Refresh timer control/status register RTCSR

R/W

H'00000000

H'FFFC0050

Refresh timer counter

RTCNT

R/W

H'00000000

H'FFFC0054

Refresh time constant register

RTCOR

R/W

H'00000000

H'FFFC0058

Bus function extending register

BSCEHR

R/W

H'0000

H'FFFE3C1A

Note:

Value when selecting the16-bit bus width with the external pin (MD0). When selecting

the 32-bit bus width, the initial value will be H'36DB 0600 and when selecting the 8-bit

bus width, the initial value will be H'36DB 0200.

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