SH7243 datasheet(328/1726 Pages) RENESAS

Part #	SH7243

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family

PDF	1726 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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328 / 1726 page

Section 9 Bus State Controller (BSC)

Rev. 1.00 Jun. 26, 2008 Page 298 of 1692

REJ09B0393-0100

Bit

Bit Name

Initial

Value

R/W

Description

CMIE

R/W

Compare Match Interrupt Enable

Enables or disables CMF interrupt requests when the

CMF bit in RTCSR is set to 1.

0: Disables CMF interrupt requests.

1: Enables CMF interrupt requests.

5 to 3

CKS[2:0]

000

R/W

Clock Select

Select the clock input to count-up the refresh timer

counter (RTCNT).

000: Stop the counting-up

001: B

φ/4

010: B

φ/16

011: B

φ/64

100: B

φ/256

101: B

φ/1024

110: B

φ/2048

111: B

φ/4096

2 to 0

RRC[2:0]

000

R/W

Refresh Count

Specify the number of continuous refresh cycles, when

the refresh request occurs after the coincidence of the

values of the refresh timer counter (RTCNT) and the

refresh time constant register (RTCOR). These bits

can make the period of occurrence of refresh long.

000: 1 time

001: 2 times

010: 4 times

011: 6 times

100: 8 times

101: Reserved (setting prohibited)

110: Reserved (setting prohibited)

111: Reserved (setting prohibited)

SH7243 Datasheet(PDF) 328 Page - Renesas Technology Corp

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