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SH7713 Datasheet(PDF) 842 Page - Renesas Technology Corp |
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SH7713 Datasheet(HTML) 842 Page - Renesas Technology Corp |
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842 / 904 page ![]() Section 24 Electrical Characteristics Rev.1.50 Aug. 30, 2006 Page 802 of 860 REJ09B0288-0150 24.3.5 Burst ROM Timing T1 Tw Twx T2B Twb T2B t AD1 t CSD1 t AD2 t AD2 t RWD1 t RWD1 t CSD1 t RSD t RSD t WED t WED t BSD t BSD t WTH t WTS t WTH t WTS t DACD t DACD t RDS3 t RDH3* 1 t RDS3 t RDH3* 1 CKIO A25 to A0 CSn RD/ WR RD WEn BS WAIT DACKn*2 D31 to D0 Notes: 1. t RDH3 is specified by earlier one of change of A25 to A0 or the RD rising edge. 2. DACKn is a waveform when active-low is specified. Figure 24.21 Burst ROM Read Cycle (One Access Wait, One External Wait, One Burst Wait, Two Bursts) |
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