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SH7713 Datasheet(PDF) 98 Page - Renesas Technology Corp

Part # SH7713
Description  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
PDF  904 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7713 Datasheet(HTML) 98 Page - Renesas Technology Corp

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Section 2 CPU
Rev.1.50 Aug. 30, 2006 Page 58 of 860
REJ09B0288-0150
Table 2.7
Arithmetic Operation Instructions
Instruction
Instruction Code
Operation
Privileged
Mode
Cycles
T Bit
ADD
Rm,Rn
0011nnnnmmmm1100
Rn+Rm
→Rn
1
–
ADD
#imm,Rn
0111nnnniiiiiiii
Rn+imm
→Rn
1
–
ADDC
Rm,Rn
0011nnnnmmmm1110
Rn+Rm+T
→Rn, Carry→T
1
Carry
ADDV
Rm,Rn
0011nnnnmmmm1111
Rn+Rm
→Rn, Overflow→T
1
Overflow
CMP/EQ
#imm,R0
10001000iiiiiiii
If R0
= imm, 1 → T
1
Compariso
n result
CMP/EQ
Rm,Rn
0011nnnnmmmm0000
If Rn
= Rm, 1 → T
1
Compariso
n result
CMP/HS
Rm,Rn
0011nnnnmmmm0010
If Rn
≥ Rm with unsigned data,
1
→ T
1
Compariso
n result
CMP/GE
Rm,Rn
0011nnnnmmmm0011
If Rn
≥ Rm with signed data,
1
→ T
1
Compariso
n result
CMP/HI
Rm,Rn
0011nnnnmmmm0110
If Rn > Rm with unsigned data,
1
→ T
1
Compariso
n result
CMP/GT
Rm,Rn
0011nnnnmmmm0111
If Rn > Rm with signed data,
1
→ T
1
Compariso
n result
CMP/PL
Rn
0100nnnn00010101
If Rn
≥ 0, 1 → T
1
Compariso
n result
CMP/PZ
Rn
0100nnnn00010001
If Rn > 0, 1
→ T
1
Compariso
n result
CMP/STR
Rm,Rn
0010nnnnmmmm1100
If Rn and Rm have an
equivalent byte, 1
→ T
1
Compariso
n result
DIV1
Rm,Rn
0011nnnnmmmm0100
Single-step division (Rn/Rm)
1
Calculation
result
DIV0S
Rm,Rn
0010nnnnmmmm0111
MSB of Rn
→ Q, MSB of Rm
→ M, M ^ Q → T
1
Calculation
result
DIV0U
0000000000011001
0
→ M/Q/T
1
0
DMULS.L
Rm,Rn
0011nnnnmmmm1101
Signed operation of Rn
× Rm
→ MACH, MACL 32 × 32 →
64 bits
2 (to 5)* –
DMULU.L
Rm,Rn
0011nnnnmmmm0101
Unsigned operation of Rn
×
Rm
→ MACH, MACL 32 × 32
→ 64 bits
2 (to 5)* –



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