SH7713 datasheet(12/904 Pages) RENESAS

12 / 904 page

Rev.1.50 Aug. 30, 2006 Page xii of xl

3.2.4

DSP Registers ......................................................................................................... 77

3.3

CPU Extended Instructions.................................................................................................. 78

3.3.1

Repeat Control Instructions .................................................................................... 78

3.3.2

Extended Repeat Control Instructions .................................................................... 88

3.4

DSP Data Transfer Instructions ........................................................................................... 93

3.4.1

General Registers.................................................................................................... 97

3.4.2

DSP Data Addressing ............................................................................................. 99

3.4.3

Modulo Addressing .............................................................................................. 100

3.4.4

Memory Data Formats .......................................................................................... 103

3.4.5

Instruction Formats of Double and Single Transfer Instructions .......................... 103

3.5

DSP Data Operation Instructions....................................................................................... 106

3.5.1

DSP Registers ....................................................................................................... 106

3.5.2

DSP Operation Instruction Set.............................................................................. 111

3.5.3

DSP-Type Data Formats....................................................................................... 116

3.5.4

ALU Fixed-Point Operations................................................................................ 118

3.5.5

ALU Integer Operations ....................................................................................... 123

3.5.6

ALU Logical Operations ...................................................................................... 125

3.5.7

Fixed-Point Multiply Operation............................................................................ 126

3.5.8

Shift Operations .................................................................................................... 128

3.5.9

Most Significant Bit Detection Operation ............................................................ 132

3.5.10 Rounding Operation.............................................................................................. 135

3.5.11 Overflow Protection.............................................................................................. 137

3.5.12 Local Data Move Instruction ................................................................................ 138

3.5.13 Operand Conflict .................................................................................................. 139

3.6

DSP Extended Function Instruction Set............................................................................. 140

3.6.1

CPU Extended Instructions................................................................................... 140

3.6.2

Double-Data Transfer Instructions ....................................................................... 142

3.6.3

Single-Data Transfer Instructions ......................................................................... 143

3.6.4

DSP Operation Instructions .................................................................................. 145

3.6.5

Operation Code Map in DSP Mode ...................................................................... 151

Section 4 Exception Handling ........................................................................... 155

4.1

Register Descriptions ......................................................................................................... 155

4.1.1

TRAPA Exception Register (TRA) ...................................................................... 156

4.1.2

Exception Event Register (EXPEVT)................................................................... 157

4.1.3

Interrupt Event Register (INTEVT)...................................................................... 157

4.1.4

Interrupt Event Register 2 (INTEVT2)................................................................. 158

4.1.5

Exception Address Register (TEA) ...................................................................... 158

4.2

Exception Handling Function ............................................................................................ 159

4.2.1

Exception Handling Flow ..................................................................................... 159

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