SH7721 datasheet(1128/1524 Pages) RENESAS

1128 / 1524 page

Section 31

MultiMediaCard Interface (MMCIF)

Rev. 3.00 Jan. 18, 2008 Page 1066 of 1458

REJ09B0033-0300

(5)

Commands with Read Data

Flash memory operation commands include a number of commands involving read data. Such

commands confirm the card status by the command argument and command response, and receive

card information and flash memory data from the DAT pin.

For multiblock transfer, there are two methods. One is the open-ended method in which the

instruction for continuing/suspending the command sequence is made by suspending the transfer

for every block. Another one is the pre-defined method in which the transfer is performed after

setting the number of blocks to be transferred.

The command sequence is suspended when FIFO is full between the block transfers. When the

command sequence is suspended, data in the receive data FIFO is processed, if necessary, and the

command sequence is then continued.

Figures 31.7 to 31.10 show the examples of the command sequence for commands with read data.

Figures 31.11 to 31.14 show the operational flowcharts for commands with read data.

• Settings needed to issue a command are made. FIFO is cleared.

• The START bit in CMDSTRT is set to 1 to start command transmission.

• Command transmission complete can be confirmed by the command output end interrupt

(CMDI).

• A command response is received from the MMC.

• If the MMC does not return the command response, the command response is detected by the

command timeout error (CTERI).

• Read data from the MMC is received.

• The suspension inter-blocks in multiblock transfer and suspension according to the FIFO full

are detected by the data transfer end interrupt (DTI) and FIFO full interrupt (FFI), respectively.

To continue the command sequence, the RD_CONTI bit in OPCR should be set to 1. To end

the command sequence, the CMDOFF bit in OPCR should be set to 1, and the CMD12 should

be issued. Note that the CMD12 is not required other than when the sequence is suspended in

pre-defined multiblock transfer.

• The end of the command sequence is detected by polling the BUSY flag in CSTR or by the

data transfer end flag (DTI) or the multiblock transfer (pre-defined) end flag (BTI).

• When the CRC error (CRCERI) or command timeout error (CTERI) occurs during command

response reception, write 1 to the CMDOFF bit.

• When the CRC error (CRCERI) or data timeout error (DTERI) occurs during the read data

reception, write 1 to the CMDOFF bit to clear the FIFO.

SH7721 Datasheet(PDF) 1128 Page - Renesas Technology Corp