SH7760 datasheet(49/1345 Pages) RENESAS

49 / 1345 page

Rev. 1.0, 02/03, page xlvii of xlviii

Table 33.11

SCIF Module Signal Timing ...............................................................................1243

Table 33.12

H-UDI Module Signal Timing ............................................................................1244

Table 33.13

CMT Module Signal Timing...............................................................................1246

Table 33.14

HCAN2 Module Signal Timing ..........................................................................1247

Table 33.15

GPIO Signal Timing ...........................................................................................1247

Table 33.16

Truth Table of I

2C I/O Buffer .............................................................................1248

Table 33.17

2C DC Characteristics ........................................................................................1248

Table 33.18

2C Bus Interface Module Signal Timing............................................................1249

Table 33.19

2C Schmitt characteristics ..................................................................................1249

Table 33.20

HSPI Module Signal Timing...............................................................................1251

Table 33.21

USB DC characteristics ......................................................................................1252

Table 33.22

USB AC characteristics ......................................................................................1253

Table 33.23

AC Characteristics of 68 Series Bus ...................................................................1255

Table 33.24

AC Characteristics of 80 Series Bus ...................................................................1256

Table 33.25

SIM Module Signal Timing ................................................................................1258

Table 33.26

MMCIF Module Signal Timing ..........................................................................1258

Table 33.27

LCDC Module Signal Timing.............................................................................1260

Table 33.28

HAC Interface Module Signal Timing................................................................1261

Table 33.29

SSI Interface Module Signal Timing ..................................................................1262

Table 33.30

A/D Converter Characteristics ............................................................................1264

Appendix

Table B.1

Clock Operating Modes (SH7760)..........................................................................1238

Table B.2

Area 0 Memory Map and Bus Width ......................................................................1238

Table B.3

Endian .....................................................................................................................1239

Table B.4

MFI Mode/LCD Mode............................................................................................1239

Table B.5

Clock Input..............................................................................................................1239

Table C.1

Pin States in Reset, Power-Down State, and Bus-Released State ...........................1240

Table G.1

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