SH7760 datasheet(13/1345 Pages) RENESAS

13 / 1345 page

Rev. 1.0, 02/03, page xi of xlviii

Section 11 Direct Memory Access Controller (DMAC) .................................. 361

11.1

Features ............................................................................................................................. 361

11.2

Input/Output Pins .............................................................................................................. 364

11.3

Register Descriptions ........................................................................................................ 365

11.3.1 DMA Source Address Register (SAR)................................................................. 371

11.3.2 DMA Destination Address Register (DAR)......................................................... 371

11.3.3 DMA Transfer Count Register (DMATCR) ........................................................ 372

11.3.4 DMA Channel Control Register (CHCR) ............................................................ 373

11.3.5 DMA Operation Register (DMAOR)................................................................... 382

11.3.6 DMA Request Resource Selection Registers (DMARSRA, DMARSRB) .......... 384

11.3.7 DMA Pin Control Register (DMAPCR) .............................................................. 388

11.3.8 DMA Request Control Register (DMARCR) ...................................................... 388

11.3.9 DMA BRG Control Register (DMABRGCR) ..................................................... 391

11.3.10 DMA Audio Source Address Register (DMAATXSAR) .................................... 395

11.3.11 DMA Audio Destination Address Register (DMAARXDAR) ............................ 395

11.3.12 DMA Audio Transmit Transfer Count Register (DMAATXTCR)...................... 396

11.3.13 DMA Audio Receive Transfer Count Register (DMAARXTCR) ....................... 396

11.3.14 DMA Audio Control Register (DMAACR)......................................................... 397

11.3.15 DMA Audio Transmit Transfer Counter (DMAATXTCNT) .............................. 400

11.3.16 DMA Audio Receive Transfer Counter (DMAARXTCNT)................................ 400

11.3.17 DMA USB Source Address Register (DMAUSAR)............................................ 401

11.3.18 DMA USB Destination Address Register (DMAUDAR).................................... 401

11.3.19 DMA USB R/W Size Register (DMAURWSZ) .................................................. 402

11.3.20 DMA USB Control Register (DMAUCR) ........................................................... 403

11.4

Operation........................................................................................................................... 404

11.4.1 DMA Transfer Procedure..................................................................................... 404

11.4.2 DMA Transfer Requests ...................................................................................... 406

11.4.3 Channel Priorities................................................................................................. 408

11.4.4 Types of DMA Transfer....................................................................................... 411

11.4.5 Number of Bus Cycles and

DREQ Pin Sampling Timing ...................................420

11.4.6 Ending DMA Transfer ......................................................................................... 441

11.4.7 Interrupt-Request Codes ...................................................................................... 444

11.5

Examples of Use ............................................................................................................... 445

11.5.1 Examples of Transfer between External Memory and an External Device

with DACK .......................................................................................................... 445

11.6

DMABRG Operation ........................................................................................................ 447

11.6.1 DMABRG Request .............................................................................................. 447

11.6.2 DMABRG Reset .................................................................................................. 447

11.6.3 DMA Transfer Operating Mode for HAC and SSI .............................................. 448

11.6.4 DMA Audio Receive Operation........................................................................... 450

11.6.5 DMA Audio Transmit Operation ......................................................................... 450

11.6.6 Auto Reload Function .......................................................................................... 453

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