SH7760 datasheet(22/1345 Pages) RENESAS

22 / 1345 page

Rev. 1.0, 02/03, page xx of xlviii

24.2.26 Port E Pull-Up Control Register (PEPUPR) ........................................................ 869

24.2.27 Port F Pull-Up Control Register (PFPUPR)......................................................... 870

24.2.28 Port G Pull-Up Control Register (PGPUPR) ....................................................... 871

24.2.29 Port H Pull-Up Control Register (PHPUPR) ....................................................... 871

24.2.30 Port J Pull-Up Control Register (PJPUPR) .......................................................... 872

24.2.31 Port K Pull-Up Control Register (PKPUPR) ....................................................... 872

24.2.32 Mode-Pin Pull-Up Control Register (MDPUPR)................................................. 873

24.2.33 Input-Pin Pull-Up Control Register (INPUPA) ................................................... 874

24.2.34 DMA Pin Control Register (DMAPCR) .............................................................. 875

24.2.35 Peripheral Module Select Register (IPSELR)...................................................... 877

24.2.36 SCIF.Hi-z Control Register (SCIHZR)................................................................ 878

24.2.37 Mode Select Register (MODSELR) .................................................................... 879

Section 25 Hitachi Audio Codec Interface (HAC)............................................ 881

25.1

Features ............................................................................................................................. 881

25.2

Input/Output Pins .............................................................................................................. 882

25.3

Register Descriptions ........................................................................................................ 883

25.3.1 Control and Status Register (HACCR) ................................................................ 885

25.3.2 Command/Status Address Register (HACCSAR) ............................................... 886

25.3.3 Command/Status Data Register (HACCSDR)..................................................... 888

25.3.4 PCM Left Channel Register (HACPCML) .......................................................... 889

25.3.5 PCM Right Channel Register (HACPCMR)........................................................ 890

25.3.6 TX Interrupt Enable Register (HACTIER) .......................................................... 891

25.3.7 TX Status Register (HACTSR)............................................................................ 892

25.3.8 RX Interrupt Enable Register (HACRIER).......................................................... 893

25.3.9 RX Status Register (HACRSR) ........................................................................... 895

25.3.10 HAC Control Register (HACACR) ..................................................................... 896

25.4

AC 97 Frame Slot Structure.............................................................................................. 898

25.5

Operation .......................................................................................................................... 899

25.5.1 Receiver ............................................................................................................... 899

25.5.2 Transmitter........................................................................................................... 900

25.5.3 DMA .................................................................................................................... 900

25.5.4 Interrupts.............................................................................................................. 900

25.5.5 Restrictions Related to HACTCR.CMDAMT ..................................................... 900

25.5.6 Initialization Sequence......................................................................................... 902

25.5.7 Power-Down Mode.............................................................................................. 907

25.5.8 Notes .................................................................................................................... 907

25.5.9 Reference ............................................................................................................. 907

Section 26 Multimedia Card Interface (MMCIF) ............................................. 909

26.1

Features ............................................................................................................................. 909

26.2

Input/Output Pins .............................................................................................................. 910

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