SH7760 datasheet(80/1345 Pages) RENESAS

80 / 1345 page

Rev. 1.0, 02/03, page 30 of 1294

2.2

2.2.1

Privileged Mode and Banks

Processor Modes: This LSI has two processor modes, user mode and privileged mode. This LSI

normally operates in user mode, and switches to privileged mode when an exception occurs or an

interrupt is accepted. There are four kinds of registers—general registers, system registers, control

registers, and floating-point registers—and the registers that can be accessed differ in the two

processor modes.

General Registers: There are 16 general registers, designated R0 to R15. General registers R0 to

R7 are banked registers which are switched by a processor mode change.

In privileged mode, the register bank bit (RB) in the status register (SR) defines which banked

When the RB bit is 1 (that is, when bank 1 is selected), the 16 registers comprising bank 1 general

registers R0_BANK1 to R7_BANK1 and non-banked general registers R8 to R15 can be accessed

as general registers R0 to R15. In this case, the eight registers comprising bank 0 general registers

R0_BANK0 to R7_BANK0 are accessed by the LDC/STC instructions. When the RB bit is 0 (that

is, when bank 0 is selected), the 16 registers comprising bank 0 general registers R0_BANK0 to

R7_BANK0 and non-banked general registers R8 to R15 can be accessed as general registers R0

to R15. In this case, the eight registers comprising bank 1 general registers R0_BANK1 to

R7_BANK1 are accessed by the LDC/STC instructions.

In user mode, the 16 registers comprising bank 0 general registers R0_BANK0 to R7_BANK0 and

non-banked general registers R8 to R15 can be accessed as general registers R0 to R15. The eight

registers comprising bank 1 general registers R0_BANK1 to R7_BANK1 cannot be accessed.

Control Registers: Control registers comprise the global base register (GBR) and status register

(SR), which can be accessed in both processor modes, and the saved status register (SSR), saved

program counter (SPC), vector base register (VBR), saved general register 15 (SGR), and debug

base register (DBR), which can only be accessed in privileged mode. Some bits of the status

System Registers: System registers comprise the multiply-and-accumulate registers

(MACH/MACL), the procedure register (PR), the program counter (PC), the floating-point

status/control register (FPSCR), and the floating-point communication register (FPUL). Access to

these registers does not depend on the processor mode.

SH7760 Datasheet(PDF) 80 Page - Renesas Technology Corp