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7733 Datasheet(PDF) 373 Page - Renesas Technology Corp |
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7733 Datasheet(HTML) 373 Page - Renesas Technology Corp |
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373 / 940 page  CLOCK GENERATING CIRCUIT 7733 Group User’s Manual 14–10 14.3 Clock control Fig. 14.3.5 Clock f2 state transition (when sub clock is not used) f2 = f(XIN)/2 f2 = f(XIN)/16 f2 = f(XIN) f2 = f(XIN)/8 CC0 = “1” CC0 = “0” CC0 = “1” CC0 = “0” CM3 = “0” CM3 = “1” CM3 = “1” CM3 = “0” (Note 1) (Note 2) Notes 1: f2 = f(XIN)/2 represents that clock f 2 is the main clock divided by 2. 2: f2 = f(XIN) represents that clock f 2 is the main clock not divided. Reset CC0: Main clock division selection bit CM3: System clock selection bit CM4: Port-Xc selection bit • When the sub clock is not used (CM 4 = “0”) |
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