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7733 Datasheet(PDF) 463 Page - Renesas Technology Corp |
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7733 Datasheet(HTML) 463 Page - Renesas Technology Corp |
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463 / 940 page  APPLICATIONS 7733 Group User’s Manual 17–55 Fig. 17.5.2 Timing chart (2) Structure of timer B block where timers B1 and B2 are internally connected Figure 17.5.3 shows the structure of the timer B block. Fig. 17.5.3 Structure of timer B block 5 V 2.75 V 2.2 V 0 V Vcc RESET INT0 Wait mode Approx. 45.5 days (Max.) ab c d Main power source Backup power source Main clock : f(XIN) Sub clock : f(XCIN) 1/32 Clock timer fc32 Timer B2 reload register Timer B1 reload register Timer B1 counter Timer B1 interrupt request bit Timer B2 interrupt request bit Event counter mode Timer B1 internal connect selection bit Clock prescaler (Timer B2 counter) System clock (Clock source for clocks f 2 to f512 and internal clock ) 17.5 Timer B |
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