7733 datasheet(309/940 Pages) RENESAS

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STOP AND WAIT MODES

7733 Group User’s Manual

11–2

The stop and wait modes are described below.

When there is no need for operation of the central processing unit (CPU), the stop and wait modes are used

to stop oscillation or internal clock

φ. The microcomputer enters the stop mode when the STP instruction

is executed; the microcomputer enters the wait mode when the WIT instruction is executed.

11.1 Overview

Table 11.1.1 lists the differences between the stop and wait modes.

The stop state of oscillation or internal clock

φ can be terminated by an interrupt request occurrence or

hardware reset.

Table 11.1.1 Differences between stop and wait modes

11.1 Overview

State in

each

mode

Operation

after each

mode is

terminated

State/Operation

Stop mode

Wait mode

Item

Features

Stopped

Operating (Note 1)

Stopped

Operating

Stopped

Operating

Clock timer*1 : Refer to section “7.6 Clock timer.”

Clocks f2 to f512, clock

φ1*2 : Refer to Figure 11.2.1.

Note 1: When the main clock external input selection bit = “1,” the main-clock oscillation circuit stops

operating; when the sub clock external input selection bit = “1,” the sub-clock oscillation circuit

stops operating. (Note that, in this case, an external clock can be input.)

2: When the main clock is the system clock, pin XIN is used; when the sub clock is the system

clock, pin XCIN is used.

Less than that

when clocks

f2 to f512

operate

Less than that

when CPU

operates

Supply of internal

clock

φ starts

after measuring

a certain time by

watchdog timer.

Supply of

internal clock

starts after f2 x

7 cycles.

Supply of internal clock

starts immediately after

termination of the wait mode.

Less than that in the wait mode

Functions using the external clock are enabled.

Functions using clocks f2 to f512 are disabled.

Operating

enabled

From the exter-

nal, a clock

must stably be

input to a clock

input pin (Note

2).

Operation after hardware reset

Long

Short

Oscillation

Internal clock

Clock timer*1

Clocks f2 to f512, clock

φ1*2

When terminated by

interrupt request

occurrence

When terminated by

hardware reset

Current consumption

Internal peripheral

devices

Interval from

termination of each

mode until execution

of instruction

Condition

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