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7477 Datasheet(PDF) 44 Page - Renesas Technology Corp

Part # 7477
Description  8-BIT SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 7470 SERIES
PDF  354 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7477 Datasheet(HTML) 44 Page - Renesas Technology Corp

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7470/7471/7477/7478 GROUP USER’S MANUAL
HARDWARE
1.7 Central processing unit (CPU)
1-27
(6) Index X mode flag (T) ....................................... Bit 5
When the Index X mode flag is “0,” arithmetic operations are performed between the Accumulator
and the memory. When this flag is “1,” direct arithmetic operations and direct data transfer between
one memory and another, between a memory and an I/O, or between one I/O and another without
passing through the accumulator. An arithmetic operation result between memory 1 directly specified
by the Index register X and memory 2 specified by an operand is stored into memory 1.
1 When the T flag is “0”
A
← A V M2
2 When the T flag is “1”
M1
← M1 V M2
V
: Denotes an arithmetic operation
A
: Content of accumulataor
M1 : Contents of memory 1 directly specified by the Index register X
M2 : Contents of memory 2 specified by the operand
This flag is set to "1" by the SET instruction and cleared to "0" by the CLT instruction. This flag is
in the undefined state immediately after hardware resetting. This flag has a direct effect on arithmetic
operations. Accordingly, be sure to initialize it.
(7) Overflow flag (V) ................................................. Bit 6
The contents of the overflow flag have significance when addition and subtraction are performed
assuming that one word is a signed binary number. When an addition or subtraction result exceeds
the range of +127 to –128, this flag is set to “1.” When the BIT instruction is executed for other
cases, the contents of bit 6 of the executed memory are put into the overflow flag.
This flag is cleared to “0” by the CLV instruction, but there is no instruction to set this flag to “1.”
In the decimal operation mode, this flag is invalidated.
(8) Negative flag (N) ................................................. Bit 7
The negative flag is set to “1” when an arithmetic processing or data transfer result is negative (bit
7 is “1”). The contents of bit 7 of the executed memory are put into this flag when the BIT instruction
is executed.
There is no instruction to change the contents of this flag.
In the decimal operation mode, this flag is invalidated.



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