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7477 Datasheet(PDF) 53 Page - Renesas Technology Corp |
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7477 Datasheet(HTML) 53 Page - Renesas Technology Corp |
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53 / 354 page  HARDWARE 1.10 I/O pins 7470/7471/7477/7478 GROUP USER’S MANUAL 1-36 Fig. 1.10.1 I/O port writing and reading Port register P0 P1 P2 P3 P4 P5 (Note) Table 1.10.1 Port register address allocation Address 00C016 00C216 00C416 00C616 00C816 00CA16 Note: The 7470/7477 group is not provided with P5. :The P channel transistor and the N channel transistor are in a cut-off state. At output : An output value can be set by writing to the Port register Port direction register ( “1” ) “H” level output “L” level output At input : A write operation is enabled to the Port register. Port register (When Writing) Port register (When Reading) Port direction register ( “0” ) Each pin state can be read in by reading the Port register. Port register. The Port register can be read out. V V |
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