AD7156

Rev. 0 | Page 16 of 28

STATUS REGISTER

Address Pointer 0x00

8 Bits, Read Only

Default Value 0x53 Before Conversion, 0x54 After Conversion

The status register indicates the status of the part. The register can be read via the 2-wire serial interface to query the status of the outputs,

check the CDC finished conversion, and check whether the CAPDAC has been changed by the auto-DAC function.

Table 6. Status Register Bit Map1

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

PwrDown

DacStep2

OUT2

DacStep1

OUT1

C1/C2

RDY2

RDY1

(0)

(1)

(0)

(1)

(0)

(0)

(1)

(1)

Table 7. Status Register Bit Descriptions

Bit

Mnemonic

Description

7

PwrDown

PwrDown = 1 indicates that the part is in a power-down.

6

DacStep2

DacStep2 = 0 indicates that the Channel 2 CAPDAC value was changed after the last CDC conversion as part of

the auto-DAC function. The bit value is updated after each finished CDC conversion on this channel.

5

OUT2

OUT2 = 1 indicates that the Channel 2 data (CIN2 capacitance) crossed the threshold, according to the selected

comparator mode of operation. The bit value is updated after each finished CDC conversion on this channel.

4

DacStep1

DacStep1 = 0 indicates that the Channel 1 CAPDAC value was changed during the last conversion as part of the

auto-DAC function. The bit value is updated after each finished CDC conversion on this channel.

3

OUT1

OUT1 = 1 indicates that the Channel 1 data (CIN1 capacitance) crossed the threshold, according to the selected

comparator mode of operation. The bit value is updated after each finished CDC conversion on this channel.

2

C1/C2

C1/C2 = 0 indicates that the last finished CDC conversion was on Channel 1.

C1/C2 = 1 indicates that the last finished CDC conversion was on Channel 2.

1

RDY2

RDY2 = 0 indicates a finished CDC conversion on Channel 2. The bit is reset back to 1 when the Channel 2 data

register is read via the serial interface or after a part reset or power-up.

0

RDY1

RDY1 = 0 indicates a finished CDC conversion on Channel 1. The bit is reset back to 1 when the Channel 1 data

register is read via serial interface or after a part reset or power-up.