AD7156

Rev. 0 | Page 19 of 28

SETUP REGISTERS

Ch 1 Address Pointer 0x0B

Ch 2 Address Pointer 0x0E

8 Bits, Read/Write, Factory Preset 0x0B

Table 10. Setup Registers Bit Map1

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

RngH

RngL

Hyst

ThrSettling (4-Bit Value)

(0)

(0)

(0)

(0)

(0x0B)

Table 11. Setup Registers Bit Descriptions

Bit

Mnemonic

Description

Range bits set the CDC input range and determine the step for the auto-DAC function.

7

6

RngH

RngL

RngH

RngL

Capacitive Input Range (pF)

Auto-DAC Step (CAPDAC LSB)

0

0

2

4

0

1

0.5

1

1

0

1

2

1

1

4

8

5

This bit should be 0 for the specified operation.

4

Hyst

Hyst = 1 disables hysteresis in adaptive threshold mode. This bit has no effect in fixed threshold mode;

hysteresis is always disabled in the fixed threshold mode.

[3:0]

ThrSettling

Determines dynamic behavior of the data average and thus the settling time of the adaptive thresholds. Data

average is calculated from the previous CDC output data, using equation:

1

2

)

1

(

)

(

)

1

(

)

(

+

−

−

+

−

=

g

ThrSettlin

N

Average

N

Data

N

Average

N

Average

where:

Average(N) is the new average value.

Average(N − 1) is the average value from the previous cycle.

Data(N) is the latest complete CDC conversion result.

ThrSettling is the programmable parameter.

The response of the average to an input capacitance step change (that is, response to the change in the CDC

output data) is an exponential settling curve characterized by the following equation:

)

1

(

)

0

(

)

(

/ TimeConst

N

e

Change

Average

N

Average

−

+

=

where:

Average(N) is the value of average N complete CDC conversion cycles after a step change on the input.

Average(0) is the value before the step change.

TimeConst can be selected in the range between 2 and 65,536 conversion cycle multiples, in steps of power of

INPUT CAPACITANCE

(CDC DATA) CHANGE

DATA AVERAGE RESPONSE

TIME

Figure 39. Data Average Response to Data Step Change