APPLICATION INFORMATION

CONNECTION DIAGRAMS

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

ADR5/ADR1/RSV

MS/ADR0/RSV

MC/SCL/FMT

MD/SDA/DEMP

MODE

ZERO1

ZERO2/AMUTEO

AMUTEI

VCC2

AGND2

VOUTR

VOUTR+

-

LRCK

BCK

DIN

RST

SCKI

VDD

DGND

VCC1

VCOM

AGND1

VOUTL

VOUTL+

-

PCM1789

R

3

LPFandBuffer

PLL170x

+3.3V

+5V

0V

20

0V

3.3V

20

R

6

R

6

R

1

R

2

AudioDSP

or

Decoder

R

3

Microcontroller

or

Microprocessor

R

5

C

3

SeeTermination

CircuitOptionsBelow

C

1

LPFandBuffer

C

4

C

2

+

C

5

+

C

6

+

TerminationCircuitOptions(selectone)

3.3V

20

20

0V

POWER SUPPLY AND GROUNDING

PCM1789

A basic connection diagram is shown in Figure 37, with the necessary power-supply bypassing and decoupling

components. Texas Instruments’ PLL170X is used to generate the system clock input at SCKI, as well as to

generate the clock for the audio signal processor. The use of series resistors (22

Ω to 100 Ω) are recommended

for SCKI, LRCK, BCK, and DIN for electromagnetic interference (EMI) reduction.

ZERO2/AMUTEO pin is used as AMUTEO.

Figure 37. Basic Connection Diagram

The PCM1789 requires +5 V for the analog supply and +3.3 V for the digital supply. The +5-V supply is used to

power the DAC analog and output filter circuitry, and the +3.3-V supply is used to power the digital filter and

serial interface circuitry. For best performance, it is recommended to use a linear regulator (such as the

REG101-5/33, REG102-5/33, or REG103-5/33) with the +5-V and +3.3-V supplies.

Five capacitors are required for supply bypassing, as shown in Figure 37. These capacitors should be located as

close as possible to the PCM1789 package. The 10-

µF capacitors are aluminum electrolytic, while the three 1-µF

capacitors are ceramic.

32

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