PCA9701 datasheet(15/28 Pages) NXP

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PCA9701_PCA9702_3

Product data sheet

Rev. 03 — 3 December 2008

15 of 28

NXP Semiconductors

PCA9701; PCA9702

18 V tolerant SPI 16-bit/8-bit GPI with INT

10. Static characteristics

[1]

VDD must be lowered to 0.2 V for at least 5 µs in order to reset device.

[2]

Minimum VIL is 2.0 V at VDD = 4.5 V.

[3]

For GPI pin voltages > 5.5 V, see Section 7.3.

Table 5.

Static characteristics

VDD = 2.5 V to 5.5 V; VSS =0V; Tamb = −40 °C to +125 °C; unless otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Supply

VDD

supply voltage

2.5

3.3

5.5

IDD

supply current

VDD = 5.5 V; input=5V or 18 V; INT_EN = VDD

1.0

2.5

µA

VPOR

power-on reset voltage[1]

1.8

2.2

General Purpose Inputs

VIL

LOW-level input voltage

[2] -

0.4VDD V

VIH

HIGH-level input voltage

0.7VDD --

input current

GPI recommended maximum current;

VI > 5.5 V; with series resistor Rs

[3] -

100

µA

IIH

HIGH-level input current

each input; VI =VDD

−1-

µA

ILI

input leakage current

VI = 17 V; 100 kΩ series resistor

−1-

µA

input capacitance

VI =VSS or VDD

2.0

5.0

Interrupt output

IOL

LOW-level output current

VDD = 4.5 V; VOL = 0.4 V

VDD = 2.5 V; VOL = 0.4 V

IOH

HIGH-level output current VOH =VDD

−1-

µA

output capacitance

SPI and control

VIL

LOW-level input voltage

0.3VDD V

VIH

HIGH-level input voltage

0.7VDD -

5.5

IIH

HIGH-level input current

SDIN; VI =VDD = 5.5 V

µA

IOL

LOW-level output current

SDOUT; VOL = 0.4 V

VDD = 4.5 V

VDD = 2.5 V

IOH

HIGH-level output current SDOUT; VOH =VDD − 0.5 V

VDD = 4.5 V

VDD = 2.5 V

input capacitance

VI =VSS or VDD

-2

output capacitance

SDOUT; CS = VDD

-4

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