LTC2452 datasheet(15/20 Pages) LINER

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LTC2452

2452fb

APPLICATIONS INFORMATION

The LT6660 reference is an ideal match for driving the

LTC2452’s REF pin. The LTC6660 is available in a 2mm

2mm DFN package with 2.5V, 3V, 3.3V and 5V options.

A 0.1μF, high quality, ceramic capacitor in parallel with a

10μF ceramic capacitor should be connected between the

REF and GND pins, as close as possible to the package. The

0.1μF capacitor should be placed closest to the ADC.

Driving VIN+ and VIN–

The input drive requirements can best be analyzed using

the equivalent circuit of Figure 16. The input signal VSIG is

connected to the ADC input pins (IN+ and IN–) through an

equivalent source resistance RS.Thisresistorincludesboth

the actual generator source resistance and any additional

optional resistors connected to the input pins. Optional

input capacitors CIN are also connected to the ADC input

pins. This capacitor is placed in parallel with the ADC

input parasitic capacitance CPAR. Depending on the PCB

layout, CPAR has typical values between 2pF and 15pF. In

addition, the equivalent circuit of Figure 16 includes the

converter equivalent internal resistor RSW and sampling

capacitor CEQ.

Figure 16. LTC2452 Input Drive Equivalent Circuit

There are some immediate trade-offs in RS and CIN without

needing a full circuit analysis. Increasing RS and CIN can

give the following beneﬁts:

1) Due to the LTC2452’s input sampling algorithm, the input

current drawn by either VIN+ or VIN– over a conversion

cycle is typically 50nA. A high RS • CIN attenuates the

high frequency components of the input current, and

RS values up to 1k result in <1LSB error.

2) The bandwidth from VSIG is reduced at the input pins

(IN+, IN–). This bandwidth reduction isolates the ADC

from high frequency signals, and as such provides

simple antialiasing and input noise reduction.

3) Switching transients generated by the ADC are attenu-

ated before they go back to the signal source.

4) A large CIN gives a better AC ground at the input pins,

helping reduce reﬂections back to the signal source.

5) Increasing RS protects the ADC by limiting the current

during an outside-the-rails fault condition.

There is a limit to how large RS • CIN should be for a given

application. Increasing RS beyond a given point increases

the voltage drop across RS due to the input current,

to the point that signiﬁcant measurement errors exist.

Additionally, for some applications, increasing the RS• CIN

product too much may unacceptably attenuate the signal

at frequencies of interest.

For most applications, it is desirable to implement CIN as

a high-quality 0.1μF ceramic capacitor and RS ≤ 1k. This

capacitor should be located as close as possible to the

actual VINpackagepin.Furthermore,theareaencompassed

by this circuit path, as well as the path length, should be

minimized.

In the case of a 2-wire sensor that is not remotely

grounded, it is desirable to split RS and place series

resistors in the ADC input line as well as in the sensor

ground return line, which should be tied to the ADC GND

pin using a star connection topology.

ILEAK

RSW

15k

(TYP)

ICONV

CIN

IN+

VCC

SIG+

SIG–

CEQ

0.35pF

(TYP)

CPAR

–

2452 F16

ILEAK

RSW

15k

(TYP)

ICONV

CIN

IN–

VCC

CEQ

0.35pF

(TYP)

CPAR

–

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