LTC2488IDE datasheet(14/28 Pages) LINER

14 / 28 page

LTC2488

2488f

APPLICATIONS INFORMATION

After power up, the device initiates an internal reset cycle

which sets the input channel to CH0 to CH1 (IN+ = CH0, IN– =

CH1). The ﬁrst conversion automatically begins at power

up using this default input channel. Once the conversion is

complete, a new word may be written into the device.

The ﬁrst three bits of the input word consist of two pre-

amble bits and one enable bit. These three bits are used

to enable the input channel selection. Valid settings for

these three bits are 000, 100, and 101. Other combinations

should be avoided.

If the ﬁrst three bits are 000 or 100, the following data

is ignored (don’t care) and the previously selected input

channel remains valid for the next conversion.

If the ﬁrst three bits shifted into the device are 101, then

the next ﬁve bits select the input channel for the next

conversion cycle (see Table 3).

The ﬁrst input bit (SGL) following the 101 sequence

determines if the input selection is differential (SGL =

0) or single-ended (SGL = 1). For SGL = 0, two adjacent

channels can be selected to form a differential input. For

SGL = 1, one of four channels is selected as the positive

input. The negative input is COM for all single ended

operations. The remaining four bits (ODD, A2, A1, A0)

determine which channel(s) is/are selected and the polarity

(for a differential input).

SERIAL INTERFACE TIMING MODES

The LTC2488’s 4-wire interface is SPI and MICROWIRE

compatible. This interface offers several ﬂexible modes

of operation. These include internal/external serial clock,

3- or 4-wire I/O, single cycle or continuous conversion. The

following sections describe each of these timing modes

in detail. In all cases, the converter can use the internal

oscillator (FO = LOW) or an external oscillator connected

to the FO pin. For each mode, the operating cycle, data

input format, data output format, and performance remain

the same. Refer to Table 4 for a summary.

Table 3 Channel Selection

MUX ADDRESS

CHANNEL SELECTION

SGL

ODD/

SIGN

COM

0000

IN+

IN–

00001

IN+

IN–

01000

IN–

IN+

01001

IN–

IN+

10000

IN+

IN–

10001

IN+

IN–

11000

IN+

IN–

11001

IN+

IN–

*Default at power up

Table 4. Serial Interface Timing Modes

CONFIGURATION

SCK

SOURCE

CONVERSION

CYCLE CONTROL

DATA OUTPUT

CONTROL

CONNECTION AND

WAVEFORMS

External SCK, Single Cycle

Conversion

External

⎯C⎯S and SCK

Figures 4, 5

External SCK, 3-Wire I/O

External

SCK

Figure 6

Internal SCK, Single Cycle

Conversion

Internal

⎯C⎯S↓

Figures 7, 8

Internal SCK, 3-Wire I/O,

Continuous Conversion

Internal

Continuous

Internal

Figure 9

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