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TLV987 Datasheet(PDF) 5 Page - Texas Instruments |
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TLV987 Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 20 page ![]() TLV987 3-V 10-BIT 27 MSPS AREA CCD SENSOR SIGNAL PROCESSOR SLAS211A – MARCH 1999 – REVISED SEPTEMBER 1999 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended operating free-air temperature range, AVDD = DVDD = 3 V, ADCCLK = 27 MHz (unless otherwise noted) total device PARAMETER TEST CONDITIONS MIN TYP MAX UNIT AICC Analog operating supply current 66 mA DICC Digital operation supply current 1 mA Device power consumption 200 mW Power consumption in power-down mode 2 mW DNL Full channel differential nonlinearity –1 ±0.6 1.5 LSB INL Full channel integral nonlinearity ±2 LSB analog-to-digital converter (ADC) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ADC resolution 10 Bits Full-scale input span 2 VPP Conversion rate 27 MHz ADC output latency 4.5 CLK cycles No missing codes Assured correlated double sampler (CDS) and programmable gain amplifier (PGA) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT CDS and PGA sample rate 27 MHz CDS full-scale input span Single-ended input 1 V Input capacitance of CDS 4 pF Minimum PGA gain 0 1 dB Maximum PGA gain 35 36 37 dB PGA gain resolution 0.09 dB PGA programming code resolution 8-bit monotonic gain control 9 Bits internal digital-to-analog converters (DAC) for offset correction PARAMETER TEST CONDITIONS MIN TYP MAX UNIT DAC resolution 8 Bits INL Integral nonlinearity ±0.6 ±1.2 LSB DNL Differential nonlinearity ±0.5 ±.99 LSB Output settling time To 1% accuracy 80 ns user digital-to-analog converters (DAC) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT DAC resolution 8 Bits INL Integral nonlinearity ±0.5 ±1.2 LSB DNL Differential nonlinearity ±0.5 ±.99 LSB Output voltage 0 AVDD V Output settling time 10-pF external load, Settle to 1 mV 4 µs |
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