Electronic Components Datasheet Search
  English  ▼

X  

TLV987 Datasheet(PDF) 12 Page - Texas Instruments

Part # TLV987
Description  3-V 10-BIT 27 MSPS AREA CCD SENSOR SIGNAL PROCESSOR
PDF  20 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TLV987 Datasheet(HTML) 12 Page - Texas Instruments

Back Button TLV987 Datasheet HTML 8Page - Texas Instruments TLV987 Datasheet HTML 9Page - Texas Instruments TLV987 Datasheet HTML 10Page - Texas Instruments TLV987 Datasheet HTML 11Page - Texas Instruments TLV987 Datasheet HTML 12Page - Texas Instruments TLV987 Datasheet HTML 13Page - Texas Instruments TLV987 Datasheet HTML 14Page - Texas Instruments TLV987 Datasheet HTML 15Page - Texas Instruments TLV987 Datasheet HTML 16Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 12 / 20 page
background image
TLV987
3-V 10-BIT 27 MSPS AREA CCD SENSOR
SIGNAL PROCESSOR
SLAS211A – MARCH 1999 – REVISED SEPTEMBER 1999
12
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
test register format
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
TB9
TB8
TB7
TB6
TB5
TB4
TB3
TB2
TB1
TB0
Default test register value =1010000000
test register description
BIT
NAME
DESCRIPTION
D9 – D6
TB9 – TB6
These four bits are used to program the internal DC bias current. The bias current
programming uses the following equation:
Ibias = 8 µA + (code) x 2 µA
Hence, Ibias varies from 8 µA (code=0000) to 38 µA (code=1111), with a linear step
of 2
µA.
The recommended setting of the code is 1010 which sets the nominal Ibias value to
28
µA.
D5, D4
TB5, TB4
Test outputs (pin 34/35 – TPM/TPP) control:
TB5
TB4
0
0 or 1 High impedance outputs at pin TPP and TPM.
1
0
Inverted internal CDS clock at pin TPP,
Inverted internal PGA clock at pin TPM.
1
1
PGA non-inverting output at pin TPP,
PGA inverting output at pin TPM.
D3
TB3
1 = Use external reference, power down internal reference
0 = Use internal reference (default).
D2
TB2
Reserved
D1, D0
TB1, TB0
Test output (pin 23, DACT) control for offset DACs:
TB1
TB0
0
0 or 1 High impedance outputs at pin DACT (default = 00)
1
0
Fine offset DAC output at pin DACT
1
1
Coarse offset DAC output at pin DACT



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com