DETAILED DESCRIPTION

SOFT START AND SELF-CALIBRATION

V

OUT

t – Time

t

SS_Delay

t

SS

PGOOD Delay at Startup

6% of V

OUT

1 V

PGOOD Delay

at Shutdown

V

COMP_EN

V

PGOOD

UDG-08108

TPS51113, TPS51163

TPS51113 and TPS51163 are cost-optimized, single channel synchronous buck controllers that operate at a

300-kHz (TPS51113) and 600-kHz (TPS51163) fixed switching frequency, from a single 4.5-V to 13.2-V supply,

a low-cost, loss-less solution. Other features include input undervoltage lockout (UVLO), programmable

overcurrent threshold, soft-start, output oververvoltage/undervoltage (OV/UV) protection.

When VDD is above 4.3 V and the COMP_EN pin is released from being pulled low with open-drain system

logic, the controller enters the start-up sequence. There is a two stage start-up sequence for the COMP_EN

soft-start begins and switching is enabled. The internal reference gradually rises to 800 mV, and the output

programmed at 5.5 ms. On average, it takes approximately 9 ms for the output voltage to come into regulation

after the COMP_EN pin is released.

Figure 7 shows the typical startup and shutdown sequence. The overcurrent protection is enabled when the

soft-start begins and the soft-start voltage exceeds the pre-biased VOS voltage. The output overvoltage

protection is enabled approximately 64 clock cycles after the COMP pin voltage rises above 0.8 V (thereby

enabling the device). When the soft-start ends, the output undervoltage protection is enabled, and PGOOD

signal also goes high at the same time.

Figure 7. Typical Startup and Shutdown Sequence

Copyright © 2009, Texas Instruments Incorporated

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Product Folder Link(s) :TPS51113 TPS51163