OVERCURRENT PROTECTION

( )

RIPPLE

OC

LDS on

OCSET

I

R

I

2

R

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(1)

OVERVOLTAGE (OV) AND UNDERVOLTAGE (UV) PROTECTION

PGOOD

TPS51113, TPS51163

Overcurrent detection is done by comparing a user programmable threshold with the voltage drop across the

low-side FET at the end of the switching period (The low-side FET is on). The OC threshold is set with a single

external resistor connected from the LDRV_OC pin to GND.

The overcurrent programming circuit applies 10-

µA of current to the LDRV_OC pin during the calibration phase

of the start-up sequence. Voltage drop on the LDRV_OC pin is measured and digitized, and the related code is

stored in the internal latch. This code determines a reference level for the overcurrent comparator. The value of

where

• R

• I

• I

• the valley of the inductor current is compared with the overcurrent threshold for protection

When the controller senses the overcurrent condition for more than two clock cycles, both the upper and the

lower MOSFETs are latched off. To restart the controller, the VDD input should be cycled.

If the overcurrent set resistor value is higher than 50 k

Ω, for example, the voltage drop on the LDRV_OC pin

exceeds 0.5 V, the controller stays in the calibration state without entering soft-start. This prevents the controller

from being activated if the overcurrent set resistor is missing.

The controller employs the dedicated VOS input to set output undervoltage and overvoltage protections. A

resistor divider with the same ratio as on the FB input is recommended for the VOS input. The overvoltage and

undervoltage thresholds for VOS are set to 25% of the internal reference, which is 800 mV.

When the voltage on VOS is lower than 600 mV, the undervoltage protection is triggered. The controller is

latched off with both the upper and lower MOSFETs turned off.

When the voltage on VOS is higher than 1 V, the overvoltage protection is activated. In the event of overvoltage,

the upper MOSFET is turned off and the lower MOSFET is forced on until VOS voltage reaches 400 mV. Then

the lower MOSFET is also turned off, and the controller is latched off.

After both the undervoltage and overvoltage events, normal operation can only be restored by cycling the VDD

voltage.

The TPS51113 and TPS51163 have a power good output that indicates HIGH when the output voltage is within

the target range. The PGOOD function is activated as soon as the soft-start ends. When the output voltage goes

± 10% outside of the target value, PGOOD goes low. When the output voltage returns to be within ± 6% of the

target value, PGOOD signal goes HIGH again. The PGOOD output is an open drain and needs external pull up

resistor.

10

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