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TPS51113 Datasheet(PDF) 15 Page - Texas Instruments |
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TPS51113 Datasheet(HTML) 15 Page - Texas Instruments |
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15 / 26 page ![]() ( ) ( ) ( ) ( ) ( ) ( ) 2 1 1 3 3 2 1 2 1 1 2 3 3 1 2 sR C 1 s R R C 1 G s R C C sR C C s 1 sR C 1 C C + ´ + + = æ ö æ ö + ´ + ´ + ç ÷ ç ÷ ç ÷ + è ø è ø (21) Z1 2 1 1 f 2 R C = p ´ ´ (22) ( ) ( ) P1 1 2 2 1 2 1 f C C 2 R C C = æ ö ´ p ´ ´ ç ÷ ç ÷ + è ø (23) P2 3 3 1 f 2 R C = p ´ ´ (24) ( ) Z2 1 3 3 1 f 2 R R C = p ´ + ´ (25) ( ) C 1 1 2 1 f 2 R C C = p ´ ´ + (26) 1 BIAS OUT 0.8 R R V 0.8 ´ = - (27) TPS51113, TPS51163 www.ti.com........................................................................................................................................................................................................ SLUS864 – MAY 2009 fP1 is usually used to cancel the ESR zero in Equation 20. fP2 can be placed at higher frequency in order to attenuate the high frequency noise and the switching ripple. fZ1 and fZ2 are chosen to be lower than the switching frequency, and fZ1 is lower than resonant frequency f0. Suitable values can be selected to achieve the compromise between high phase margin and fast response. A phase margin of over 60° is usually recommended. Then, the compensator gain is chosen to achieve the desired bandwidth. The value of RBIAS is calculated to set the output voltage VOUT. Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 15 Product Folder Link(s) :TPS51113 TPS51163 |
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