LT3582 datasheet(10/28 Pages) LINER

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LT3582/LT3582-5/LT3582-12

3582512f

OPERATION

The LT3582 series are dual DC/DC converters, each con-

taining both a Boost and an Inverting converter. Operation

can be best understood by referring to the Block Diagram.

The Boost and Inverting converters each use a novel control

technique, which simultaneously varies both peak inductor

current and switch off time. This results in high efﬁciency

over a large load range and low output voltage ripple. In

addition, this technique further minimizes output ripple

when the switching frequency is in the audio band.

Boost Converter: The Boost converter uses a grounded

source NMOS power transistor as the main switching ele-

ment. The current in the NMOS is constantly monitored and

controlled, along with the off time of the switch to achieve

regulation of VOUTP. The VOUTP voltage is divided by the

internal programmable (LT3582 only) resistor divider to

create FBP. The voltage on FBP is compared to an internal

reference and ampliﬁed, creating an error signal on the

VCP node which commands the appropriate peak inductor

current and off time for the subsequent switching cycle.

Inverting Converter: The Inverting converter uses a power

PMOS transistor with the source connected to VIN. This

topology requires only one external inductor, instead of

the normally required two inductors plus ﬂying capacitor.

Regulation is achieved in a similar manner as the Boost.

Output Power-up Sequencing: After an initial startup delay

(TSTARTUP = 64μS typical), the outputs VOUTP and VOUTN

rise (in magnitude) simultaneously with the LT3582-5/

LT3582-12 or in one of four selectable sequences with

the LT3582. Using the I2C interface, the LT3582 outputs

can be conﬁgured such that (1) they both rise simultane-

ously, (2) VOUTP rises to regulation before VOUTN rises, (3)

VOUTN rises to regulation before VOUTP rises, or (4) neither

output rises. The outputs of the LT3582-5 and LT3582-12

are pre-conﬁgured to rise simultaneously.

The ramp rates of the outputs are proportional to the ramp

rates of their respective RAMP pins. A capacitor is placed

between each RAMP pin and ground. The RAMP pins are

discharged during shutdown. Once enabled, conﬁgurable

(LT3582) or pre-conﬁgured (LT3582-5/LT3582-12) cur-

rents charge each RAMP pin in the desired sequence

causing the outputs to rise.

Output Power-Down Discharge: The power-down dis-

charge feature is permanently enabled on the LT3582-5

and LT3582-12 and can be enabled or disabled through

I2C on the LT3582. Upon SHDN falling, and when power-

down discharge is enabled, internal transistors will acti-

vate to assist in discharging the outputs toward ground.

When power-down discharge is disabled, the chip powers

down immediately after SHDN falls and the outputs will

discharge on their own depending on their external load

capacitances and currents.

OTP Memory (LT3582 Only): The LT3582 includes 22 bits

of user programmable output settings and 1 programming

lockout bit. Parameters such as positive & negative output

voltages and power sequencing settings can be changed

in real time with the integrated I2C interface. Settings can

then be made permanent by programming to the on-chip

non-volatile OTP (One Time Programmable) memory.

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