IMX51 datasheet(37/184 Pages) FREESCALE

37 / 184 page

Electrical Characteristics

i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 1

Freescale Semiconductor

Preliminary—Subject to Change Without Notice

3.6.4

Clock Amplifier Parameters (CKIH1, CKIH2)

The input to Clock Amplifier (CAMP) is internally ac-coupled allowing direct interface to a square wave

or sinusoidal frequency source. No external series capacitors are required

3.6.5

DPLL Electrical Parameters

Table 34. CAMP Electrical Parameters (CKIH1, CKIH2)

Parameter

Min

Typ

Max

Unit

Input frequency

8.0

—

40.0

MHz

VIL (for square wave input)

—

0.3

VIH (for square wave input)

(VCC 1 –0.25)

1 VCC is the supply voltage of CAMP.

—3

Sinusoidal input amplitude

0.4 2

2 This value of the sinusoidal input will be determined during characterization.

—VDD

Vp-p

Output duty cycle

Table 35. DPLL Electrical Parameters

Parameter

Test Conditions/Remarks

Min

Typ

Max

Unit

Reference clock frequency range1

1 Device input range cannot exceed the electrical specifications of the CAMP, see Table 34.

—

100

MHz

Reference clock frequency range after

pre-divider

—10

—

MHz

Output clock frequency range (dpdck_2)

—

300

—

1025

MHz

Pre-division factor2

2 The values specified here are internal to DPLL. Inside the DPLL, a “1” is added to the value specified by the user.Therefore,

the user has to enter a value “1” less than the desired value at the inputs of DPLL for PDF and MFD.

—1

—

Multiplication factor integer part

—

Multiplication factor numerator3

Should be less than denominator

–67108862

—

67108862

—

Multiplication factor denominator2

—

67108863

—

Output Duty Cycle

—

48.5

51.5

Frequency lock time4

(FOL mode or non-integer MF)

——

—

398

Tdpdref

Phase lock time

—

100

µs

Frequency jitter5 (peak value)

—

0.02

0.04

Tdck

Phase jitter (peak value)

FPL mode, integer and fractional MF

—

2.0

3.5

Power dissipation

fdck = 300 MHz @ avdd = 1.8 V,

dvdd = 1.2 V

fdck = 650 MHz @ avdd = 1.8 V,

dvdd = 1.2 V

—

0.65 (avdd)

0.92 (dvdd)

1.98 (avdd)

1.8 (dvdd)

IMX51 Datasheet(PDF) 37 Page - Freescale Semiconductor, Inc

IMX51 Datasheet(HTML) 37 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL