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ICS845204 Datasheet(PDF) 10 Page - Integrated Device Technology |
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ICS845204 Datasheet(HTML) 10 Page - Integrated Device Technology |
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10 / 13 page ![]() ICS845204 CRYSTAL-TO-MLVDS CLOCK SYNTHESIZER W/SPREAD SPECTRUM ADVANCE INFORMATION IDT™ / ICS™ M-LVDS CLOCK SYNTHESIZER 10 ICS845204AK SEPTEMBER 25, 2007 3.3V M-LVDS Driver Termination A general M-LVDS interface is shown in Figure 5 In a 100 Ω differential transmission line environment, M-LVDS drivers require a matched load termination of 100 Ω across near the receiver input. For a multiple M-LVDS outputs buffer, if only partial outputs are used, it is recommended to terminate the unused outputs. Figure 5. Typical M-LVDS Driver Termination Reliability Information Table 7. θJA vs. Air Flow Table for a 32Lead VFQFN Transistor Count The transistor count for ICS845204 is: 3749 3.3V LVDS Driver R1 100 Ω R2 100 Ω – + 3.3V 50 Ω 50 Ω 100 Ω Differential Transmission Line θ JA vs. Air Flow Meters per Second 01 2.5 Multi-Layer PCB, JEDEC Standard Test Boards 42.4°C/W 37.0°C/W 33.2°C/W |
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