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LPC1313 Datasheet(PDF) 30 Page - NXP Semiconductors |
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LPC1313 Datasheet(HTML) 30 Page - NXP Semiconductors |
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30 / 53 page ![]() LPC1311_13_42_43_1 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 01 — 11 December 2009 30 of 53 NXP Semiconductors LPC1311/13/42/43 32-bit ARM Cortex-M3 microcontroller [1] Typical ratings are not guaranteed. The values listed are at room temperature (25 °C), nominal supply voltages. [2] Tie together VDD(3V3) and VDD(IO) externally. If separate supplies are used for VDD(3V3) and VDD(IO), ensure that the voltage difference between both supplies is smaller than or equal to 0.5 V. [3] IRC enabled; system oscillator disabled; system PLL disabled. [4] BOD disabled. [5] All peripherals disabled in the AHBCLKCTRL register. Peripheral clocks to UART, SSP, trace clock, and SysTick timer disabled in the syscon block. [6] IRC disabled; system oscillator enabled; system PLL enabled. [7] All oscillators and analog blocks turned off in the PDSLEEPCFG register; PDSLEEPCFG = 0xFFFF FFFF [8] WAKEUP pin pulled HIGH externally. [9] For LPC134x: USB_DP and USB_DM pulled LOW externally. [10] Including voltage on outputs in 3-state mode. [11] VDD(3V3) and VDD(IO) supply voltages must be present. [12] 3-state outputs go into 3-state mode when VDD(IO) is grounded. [13] Accounts for 100 mV voltage drop in all supply lines. [14] Allowed as long as the current limit does not exceed the maximum current allowed by the device. [15] To VSS. [16] Includes external resistors of 33 Ω± 1 % on USB_DP and USB_DM. USB pins (LPC1342/43 only) IOZ OFF-state output current 0V<VI < 3.3 V - - ±10 µA VBUS bus supply voltage - - 5.25 V VDI differential input sensitivity voltage |(D+) − (D−)| 0.2 - - V VCM differential common mode voltage range includes VDI range 0.8 - 2.5 V Vth(rs)se single-ended receiver switching threshold voltage 0.8 - 2.0 V VOL LOW-level output voltage for low-/full-speed; RL of 1.5 kΩ to 3.6 V - - 0.18 V VOH HIGH-level output voltage driven; for low-/full-speed; RL of 15 kΩ to GND 2.8 - 3.5 V Ctrans transceiver capacitance pin to GND - - 20 pF ZDRV driver output impedance for driver which is not high-speed capable with 33 Ω series resistor; steady state drive [16] 36 - 44.1 Ω Table 7. Static characteristics …continued Tamb = −40 °C to +85 °C, unless otherwise specified. Symbol Parameter Conditions Min Typ[1] Max Unit |
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