LPC1313 datasheet(33/53 Pages) NXP

33 / 53 page

LPC1311_13_42_43_1

Product data sheet

Rev. 01 — 11 December 2009

33 of 53

NXP Semiconductors

LPC1311/13/42/43

32-bit ARM Cortex-M3 microcontroller

9.1 BOD static characteristics

[1]

Interrupt levels are selected by writing the level value to the BOD control register BODCTRL, see

LPC13xx

user manual.

9.2 Power consumption

Table 9.

BOD static characteristics[1]

Tamb =25 °C.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Vth

threshold voltage

interrupt level 0

assertion

1.69

de-assertion

1.84

interrupt level 1

assertion

2.29

de-assertion

2.44

interrupt level 2

assertion

2.59

de-assertion

2.74

interrupt level 3

assertion

2.87

de-assertion

2.98

reset level 0

assertion

1.49

de-assertion

1.64

Conditions: Tamb = 25 °C; active mode entered executing code while(1){} from ﬂash;

VDD(3V3) = 3.3 V; internal pull-up resistors disabled; system oscillator and system PLL enabled;

IRC, BOD disabled; all peripherals disabled in the AHBCLKCTRL register (AHBCLKCTRL = 0x1F);

all peripheral clocks disabled.

Fig 9.

Typical supply current versus regulator supply voltage VDD(3V3) in active mode

VDD(3V3) (V)

2.0

3.6

3.2

2.8

2.4

002aae993

IDD

(mA)

24 MHz

48 MHz

12 MHz

36 MHz

72 MHz

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