LPC1765 datasheet(22/66 Pages) NXP

22 / 66 page

LPC1769_68_67_66_65_64_4

Product data sheet

Rev. 04 — 1 February 2010

22 of 66

NXP Semiconductors

LPC1769/68/67/66/65/64

32-bit ARM Cortex-M3 microcontroller

• Scalable realization of endpoints at run time.

• Endpoint Maximum packet size selection (up to USB maximum specification) by

software at run time.

• Supports SoftConnect and GoodLink features.

• While USB is in the Suspend mode, the LPC1769/68/66/65/64 can enter one of the

reduced power modes and wake up on USB activity.

• Supports DMA transfers with all on-chip SRAM blocks on all non-control endpoints.

• Allows dynamic switching between CPU-controlled slave and DMA modes.

• Double buffer implementation for Bulk and Isochronous endpoints.

7.12.2 USB host controller (LPC1769/68/66/65 only)

The host controller enables full- and low-speed data exchange with USB devices attached

to the bus. It consists of a register interface, a serial interface engine, and a DMA

controller. The register interface complies with the OHCI specification.

7.12.2.1

Features

• OHCI compliant.

• One downstream port.

• Supports port power switching.

7.12.3 USB OTG controller (LPC1769/68/66/65 only)

USB OTG is a supplement to the USB 2.0 specification that augments the capability of

existing mobile devices and USB peripherals by adding host functionality for connection to

USB peripherals.

The OTG Controller integrates the host controller, device controller, and a master-only

I2C-bus interface to implement OTG dual-role device functionality. The dedicated I2C-bus

interface controls an external OTG transceiver.

7.12.3.1

Features

• Fully compliant with On-The-Go supplement to the USB 2.0 Specification, Revision

1.0a.

• Hardware support for Host Negotiation Protocol (HNP).

• Includes a programmable timer required for HNP and Session Request Protocol

(SRP).

• Supports any OTG transceiver compliant with the OTG Transceiver Specification

(CEA-2011), Rev. 1.0.

7.13 CAN controller and acceptance filters (LPC1769/68/66/65/64 only)

The Controller Area Network (CAN) is a serial communications protocol which efficiently

supports distributed real-time control with a very high level of security. Its domain of

application ranges from high-speed networks to low cost multiplex wiring.

The CAN block is intended to support multiple CAN buses simultaneously, allowing the

device to be used as a gateway, switch, or router among a number of CAN buses in

industrial or automotive applications.

LPC1765 Datasheet(PDF) 22 Page - NXP Semiconductors

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