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LPC2290 Datasheet(PDF) 18 Page - NXP Semiconductors |
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LPC2290 Datasheet(HTML) 18 Page - NXP Semiconductors |
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18 / 41 page ![]() LPC2290_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 16 November 2006 18 of 41 NXP Semiconductors LPC2290 16/32-bit ARM microcontroller with external memory interface • All I/O default to inputs after reset. 6.7.2 Fast I/O features available in LPC2290/01 only • Fast I/O registers are located on the ARM local bus for the fastest possible I/O timing. • All GPIO registers are byte addressable. • Entire port value can be written in one instruction. • Mask registers allow single instruction to set or clear any number of bits in one port. 6.8 10-bit ADC The LPC2290 each contain a single 10-bit successive approximation ADC with eight multiplexed channels. 6.8.1 Features • Measurement range of 0 V to 3.3 V. • Capable of performing more than 400000 10-bit samples per second. • Burst conversion mode for single or multiple inputs. • Optional conversion on transition on input pin or Timer Match signal. 6.8.2 ADC features available in LPC2290/01 only • Every analog input has a dedicated result register to reduce interrupt overhead. • Every analog input can generate an interrupt once the conversion is completed. 6.9 CAN controllers and acceptance filter The LPC2290 contains two CAN controllers. The CAN is a serial communications protocol which efficiently supports distributed real-time control with a very high level of security. Its domain of application ranges from high-speed networks to low cost multiplex wiring. 6.9.1 Features • Data rates up to 1 Mbit/s on each bus. • 32-bit register and RAM access. • Compatible with CAN specification 2.0B, ISO 11898-1. • Global Acceptance Filter recognizes 11-bit and 29-bit RX identifiers for all CAN buses. • Acceptance Filter can provide FullCAN-style automatic reception for selected Standard identifiers. • Full CAN messages can generate interrupts. 6.10 UARTs The LPC2290 contains two UARTs. In addition to standard transmit and receive data lines, UART1 also provides a full modem control handshake interface. 6.10.1 Features • 16 B Receive and Transmit FIFOs. |
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