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AD5748 Datasheet(PDF) 5 Page - Analog Devices |
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AD5748 Datasheet(HTML) 5 Page - Analog Devices |
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5 / 32 page ![]() AD5748 Rev. A | Page 5 of 32 Parameter 1 Min Typ Max Unit Test Conditions/Comments Output Noise Spectral Density 165 nV/√Hz Measured at 10 kHz; specified with 2 kΩ || 220 pF AC PSRR −65 dB 200 mV, 50 Hz/60 Hz sine wave superimposed on power supply voltage DC PSRR 10 μV/V Outputs unloaded CURRENT OUTPUT, IOUT Output Current Ranges 0 21 mA 4 21 mA Accuracy, Internal RSET 4 Total Unadjusted Error (TUE)2 −0.5 +0.5 % FSR −0.3 ±0.15 +0.3 % FSR TA = 25°C Relative Accuracy (INL) −0.02 ±0.01 +0.02 % FSR 4 mA to 21 mA, 0 mA to 21 mA Offset Error −16 +16 μA 4 mA to 21 mA, 0 mA to 21 mA −10 +5 +10 μA TA = 25°C Offset Error TC3 ±3 ppm FSR/°C 4 mA to 21 mA, 0 mA to 21 mA Gain Error −0.2 +0.2 % FSR 4 mA to 21 mA, 0 mA to 21 mA −0.03 ±0.006 +0.03 % FSR TA = 25°C Gain TC3 ±8 ppm FSR/°C 4 mA to 21 mA, 0 mA to 21 mA Full-Scale Error −0.2 +0.2 % FSR 4 mA to 21 mA, 0 mA to 21 mA −0.125 ±0.02 +0.125 % FSR TA = 25°C Full-Scale TC3 ±4 ppm FSR/°C 4 mA to 21 mA, 0 mA to 21 mA Accuracy, External RSET4 Total Unadjusted Error (TUE)2 −0.3 +0.3 % FSR −0.1 ±0.02 +0.1 % FSR TA = 25°C Relative Accuracy (INL) −0.02 ±0.01 +0.02 % FSR 4 mA to 21 mA, 0 mA to 21 mA Offset Error −14 +14 μA 4 mA to 21 mA, 0 mA to 21 mA −11 +5 +11 μA TA = 25°C Offset Error TC3 ±2 ppm FSR/°C 4 mA to 21 mA, 0 mA to 21 mA Gain Error −0.08 +0.08 % FSR 4 mA to 21 mA, 0 mA to 21 mA −0.07 ±0.02 +0.07 % FSR TA = 25°C Gain TC ±1 ppm FSR/°C 4 mA to 21 mA, 0 mA to 21 mA Full-Scale Error −0.1 +0.1 % FSR 4 mA to 21 mA, 0 mA to 21 mA −0.07 ±0.02 +0.07 % FSR TA = 25°C Full-Scale TC3 ±2 ppm FSR/°C 4 mA to 21 mA, 0 mA to 21 mA CURRENT OUTPUT CHARACTERISTICS3 Current Loop Compliance Voltage 0 AVDD − 2.75 V Resistive Load See comments Chosen so that compliance is not exceeded Inductive Load See comments Needs appropriate capacitor at higher inductance values; see the Driving Inductive Loads section Settling Time 4 mA to 21 mA, Full-Scale Step 8.5 μs 250 Ω load 120 μA Step, 4 mA to 21 mA Range 1.2 μs 250 Ω load DC PSRR 1 μA/V Output Impedance 130 MΩ DIGITAL INPUT JEDEC compliant Input High Voltage, VIH 2 V Input Low Voltage, VIL 0.8 V Input Current −1 +1 μA Per pin Pin Capacitance 5 pF Per pin DIGITAL OUTPUTS3 FAULT, IFAULT, TEMP, VFAULT Output Low Voltage, VOL 0.4 V 10 kΩ pull-up resistor to DVCC Output Low Voltage, VOL 0.6 V At 2.5 mA Output High Voltage, VOH 3.6 V 10 kΩ pull-up resistor to DVCC |
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