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DSP56303 Datasheet(PDF) 35 Page - Freescale Semiconductor, Inc |
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DSP56303 Datasheet(HTML) 35 Page - Freescale Semiconductor, Inc |
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35 / 108 page ![]() AC Electrical Characteristics DSP56303 Technical Data, Rev. 11 Freescale Semiconductor 2-15 2.5.5.2 DRAM Timing The selection guides in Figure 2-14 and Figure 2-17 are for primary selection only. Final selection should be based on the timing in the following tables. For example, the selection guide suggests that four wait states must be used for 100 MHz operation with Page Mode DRAM. However, consulting the appropriate table, a designer can evaluate whether fewer wait states might suffice by determining which timing prevents operation at 100 MHz, running the chip at a slightly lower frequency (for example, 95 MHz), using faster DRAM (if it becomes available), and manipulating control factors such as capacitive and resistive load to improve overall system performance. Figure 2-14. DRAM Page Mode Wait State Selection Guide Chip frequency (MHz) DRAM type (tRAC ns) 100 80 70 60 40 66 80 100 1 Wait states 2 Wait states 3 Wait states 4 Wait states Note: This figure should be used for primary selection. For exact and detailed timings, see the following tables. 50 120 |
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