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82X38 Datasheet(PDF) 13 Page - Intel Corporation

Part # 82X38
Description  Express Chipset
PDF  342 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

82X38 Datasheet(HTML) 13 Page - Intel Corporation

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Datasheet
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Intel® 82X38 MCH Features
§
• Processor/Host Interface (FSB)
—Supports Intel® Core™2 Duo desktop processor
—Supports Intel® Core™2 Quad desktop processor
— 800/1067/1333 MT/s (200/266/333 MHz) FSB
— Hyper-Threading Technology (HT Technology)
— FSB Dynamic Bus Inversion (DBI)
— 36-bit host bus addressing
— 12-deep In-Order Queue
— 1-deep Defer Queue
— GTL+ bus driver with integrated GTL termination resistors
— Supports cache Line Size of 64 bytes
• System Memory Interface
— One or two channels (each channel consisting of 64 data lines)
— Single or Dual Channel memory organization
— DDR2-800/667 frequencies
— DDR3-1066/800 frequencies
— Unbuffered, ECC and non-ECC DDR2 or non-ECC DDR3 DIMMs
— Supports 1-Gb, 512-Mb DDR2 or DDR3 technologies for x8 and
x16 devices
— 8 GB maximum memory
• Direct Media Interface (DMI)
— Chip-to-chip connection interface to Intel ICH9
— 2 GB/s point-to-point DMI to ICH9 (1 GB/s each direction)
— 100 MHz reference clock (shared with PCI Express graphics
attach)
— 32-bit downstream addressing
— Messaging and Error Handling
•PCI Express* Interface
— Two x16 PCI Express ports
— Compatible with the PCI Express Base Specification,
Revision 2.0
— Raw bit rate on data pins of 5 Gb/s resulting in a real
bandwidth per pair of 500 MB/s
• Thermal Sensor
— Catastrophic Trip Point support
— Hot Trip Point support for SMI generation
• Power Management
— PC99 suspend to DRAM support (“STR”, mapped to
ACPI state S3)
— ACPI Revision 2.0 compatible power management
— Supports processor states: C0, C1, C2
— Supports System states: S0, S1, S3 (Cold), and S5
— Supports processor Thermal Management 2
•Package
—FC-BGA
— 40 mm × 40 mm package size
— 1300 balls, located in a non-grid pattern



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