82X38 datasheet(28/342 Pages) INTEL

28 / 342 page

Signal Description

Datasheet

2.2.2

System Memory Channel B Interface Signals

DDR_A_CB_[7:0]

I/O

SSTL-1.8

ECC Check Byte

DDR_A_DM_[7:0]

SSTL-1.8/1.5

DDR2/DDR3 Data Mask

DDR_A_DQS_[8:0]

I/O

SSTL-1.8/1.5

DDR2/DDR3 Data Strobes

DDR_A_DQSB_[8:0]

I/O

SSTL-1.8/1.5

DDR2/DDR3 Data Strobe Complements

Signal Name

Type

Description

DDR_B_CK

SSTL-1.8/1.5

SDRAM Differential Clocks:

— DDR2: Three per DIMM

— DDR3: Two per DIMM

DDR_B_CKB

SSTL-1.8/1.5

SDRAM Inverted Differential Clocks:

— DDR2: Three per DIMM

— DDR3: Two per DIMM

DDR_B_CSB_[3:0]

SSTL-1.8/1.5

DDR2/DDR3 Device Rank 3, 2, 1, and 0 Chip

Select

DDR_B_CKE_[3:0]

SSTL-1.8/1.5

DDR2/DDR3 Clock Enable:

(1 per Device Rank)

DDR_B_ODT_[2:0]

SSTL-1.8/1.5

DDR2/DDR3 Device Rank 2, 1, and 0 On Die

Termination

DDR_B_ODT_3

SSTL-1.8

DDR2 Device Rank 3 On Die Termination

DDR3_B_ODT_3

SSTL-1.5

DDR3 Device Rank 3 On Die Termination

DDR_B_MA_[14:0]

SSTL-1.8/1.5

DDR2/DDR3 Address Signals [14:0]

DDR_B_BS_[2:0]

SSTL-1.8/1.5

DDR2/DDR3 Bank Select

DDR_B_RASB

SSTL-1.8/1.5

DDR2/DDR3 Row Address Select signal

DDR_B_CASB

SSTL-1.8/1.5

DDR2/DDR3 Column Address Select signal

DDR_B_WEB

SSTL-1.8/1.5

DDR2/DDR3 Write Enable signal

DDR_B_DQ_[63:0]

I/O

SSTL-1.8/1.5

DDR2/DDR3 Data Lines

Signal Name

Type

Description

82X38 Datasheet(PDF) 28 Page - Intel Corporation

82X38 Datasheet(HTML) 28 Page - Intel Corporation

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