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System Address Map

3.7

System Management Mode (SMM)

System Management Mode uses main memory for System Management RAM (SMM

RAM). The MCH supports: Compatible SMRAM (C_SMRAM), High Segment (HSEG), and

Top of Memory Segment (TSEG). System Management RAM space provides a memory

area that is available for the SMI handlers and code and data storage. This memory

resource is normally hidden from the system OS so that the processor has immediate

access to this memory space upon entry to SMM. MCH provides three SMRAM options:

• Below 1 MB option that supports compatible SMI handlers.

• Above 1 MB option that allows new SMI handlers to execute with write-back

cacheable SMRAM.

• Optional TSEG area of 1 MB, 2 MB, or 8 MB in size. The TSEG area lies below stolen

memory.

The above 1 MB solutions require changes to compatible SMRAM handlers code to

properly execute above 1 MB.

Note:

DMI Interface and PCI Express masters are not allowed to access the SMM space.

3.7.1

SMM Space Definition

SMM space is defined by its addressed SMM space and its DRAM SMM space. The

addressed SMM space is defined as the range of bus addresses used by the processor

to access SMM space. DRAM SMM space is defined as the range of physical DRAM

memory locations containing the SMM code. SMM space can be accessed at one of

three transaction address ranges: Compatible, High, and TSEG. The Compatible and

TSEG SMM space is not remapped and therefore the addressed and DRAM SMM space

is the same address range. Since the High SMM space is remapped the addressed and

DRAM SMM space is a different address range. Note that the High DRAM space is the

same as the Compatible Transaction Address space. Table 5 describes three unique

address ranges.

• Compatible Transaction Address

• High Transaction Address

• TSEG Transaction Address

Table 5.

Transaction Address Ranges – Compatible, High, and TSEG

SMM Space Enabled

Transaction Address Space

DRAM Space (DRAM)

Compatible

000A_0000h to 000B_FFFFh

High

FEDA_0000h to FEDB_FFFFh

000A_0000h to 000B_FFFFh

TSEG

(TOLUD–STOLEN–TSEG) to

TOLUD–STOLEN

(TOLUD–STOLEN–TSEG) to

TOLUD–STOLEN

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