TDA9898HLSLASHV3 datasheet(31/103 Pages) NXP

31 / 103 page

TDA9897_TDA9898_4

Product data sheet

Rev. 04 — 25 May 2009

31 of 103

NXP Semiconductors

TDA9897; TDA9898

Multistandard hybrid IF processing

Table 31.

Output mode at pin MPP for ATV or radio mode

Bit

Pin MPP output mode

VAGC

RADIO

MPPS1

MPPS0

W7[6]

W1[7]

W4[5]

W4[4]

gain control voltage of FM PLL

gain control voltage of SIF ampliﬁer

TAGC monitor voltage

0011

AFC current output, VIF PLL

0111

AFC current output, radio mode

gain control voltage of VIF ampliﬁer

Table 32.

W5 - data write register bit allocation

FSFREQ1

FSFREQ0

SFREQ5

SFREQ4

SFREQ3

SFREQ2

SFREQ1

SFREQ0

Table 33.

W5 - data write register bit description

Bit

Symbol

Description

7 and 6

FSFREQ[1:0] DTV ﬁlter or sound trap selection for video

ATV; sound trap; TV = 1; see Table 16 and Table 17

00 = M/N standard (4.5 MHz)

01 = B/G standard (5.5 MHz)

10 = I standard (6.0 MHz)

11 = D/K and L/L-accent standard (6.5 MHz)

DTV (low IF); upper BP cut-off frequency; TV = 0; see Table 16 and

Table 17

00 = 7.0 MHz

01 = 8.0 MHz

10 = 9.0 MHz

11 = recommended mode for direct IF; W6[0] = 1

5 to 0

SFREQ[5:0]

synthesizer frequencies; see Table 34 and Table 35

TDA9898HL/V3 Datasheet(PDF) 31 Page - NXP Semiconductors

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