TDA9898HLSLASHV3 datasheet(45/103 Pages) NXP

45 / 103 page

TDA9897_TDA9898_4

Product data sheet

Rev. 04 — 25 May 2009

45 of 103

NXP Semiconductors

TDA9897; TDA9898

Multistandard hybrid IF processing

Video output 1.7 V; pin CVBS; see Figure 50, optional CVBS buffer at setting W6[1] = 1

Normal mode (sound carrier trap active) and sound carrier on

Vo(video)(p-p)

peak-to-peak video output

voltage

positive or negative

modulation; W6[1] = 1;

see Figure 10

W4[7] = 0; W7[4] = 0

1.44

1.7

1.96

W4[7] = 1; W7[4] = 0

1.44

1.7

1.96

W4[7] = 0; W7[4] = 1

1.44

1.7

1.96

Vsyncl

sync level voltage

W4[7] = 0; W7[4] = 0

1.0

1.2

1.4

W4[7] = 1; W7[4] = 0

0.9

1.2

1.5

W4[7] = 0; W7[4] = 1

0.9

1.2

1.5

Video output 1.1 V; pin CVBS

Trap bypass mode and sound carrier off[12]

Vo(video)(p-p)

peak-to-peak video output

voltage

see Figure 10

1.1

Vsyncl

sync level voltage

1.5

Vclip(video)u

upper video clipping

voltage

VP − 1.2 VP − 1-

Vclip(video)l

lower video clipping voltage

0.4

0.9

Bvideo(−3dB)

−3 dB video bandwidth

AC load: CL <20pF,

RL >1kΩ

MHz

(S/N)w

weighted signal-to-noise

ratio

B/G standard; 50 % grey

video signal; uniﬁed

weighting ﬁlter

(

“ITU-T J.61”);

see Figure 20

[9] 54

(S/N)unw

unweighted signal-to-noise

ratio

M/N standard; 50 IRE grey

video signal;

see Figure 20

[9] 47

VIF AGC

Pin MPP

Vmonitor(VIFAGC)

VIF AGC monitor voltage

[3] 0.5

4.5

VAGC

AGC voltage

see Figure 12; Vi(IF) set to

1 mV (60 dB

µV)

2.0

2.5

10 mV (80 dB

µV)

2.4

3.0

200 mV (106 dB

µV)

3.0

Table 53.

Characteristics …continued

VP =5V; Tamb =25 °C; see Table 24 for input frequencies; B/G standard is used for the speciﬁcation (fPC = 38.375 MHz;

fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level

for L); IF input from 50

Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for

B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;

internal Nyquist slope switched on (W7[0] = 0); measurements taken in test circuit of Figure 51; unless otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

TDA9898HL/V3 Datasheet(PDF) 45 Page - NXP Semiconductors

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