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TDA9898HL/V3 Datasheet(PDF) 51 Page - NXP Semiconductors

Part # TDA9898HL/V3
Description  Multistandard hybrid IF processing
PDF  103 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

TDA9898HL/V3 Datasheet(HTML) 51 Page - NXP Semiconductors

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TDA9897_TDA9898_4
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 — 25 May 2009
51 of 103
NXP Semiconductors
TDA9897; TDA9898
Multistandard hybrid IF processing
VAGC(SIF)
SIF AGC voltage
FM mode
VSIF = 100 µV
1.2
-
2.1
V
VSIF = 10 mV
2.4
-
3.2
V
VSIF = 140 mV
3.1
-
VP
V
AM mode
VSIF = 100 µV
1.4
-
2.3
V
VSIF = 10 mV
2.6
-
3.4
V
VSIF = 70 mV
3.2
-
VP
V
Conversion synthesizer PLL; pin LFSYN2 (radio mode)
VLFSYN2
voltage on pin LFSYN2
1
-
3
V
KO
VCO steepness
∆fVCO / ∆VLFSYN2
-
31
-
MHz/V
KD
phase detector steepness
∆ILFSYN2 / ∆ϕVCO;
see Table 57;
fVCO selection:
22 MHz to 29.5 MHz
-
32
-
µA/rad
30 MHz to 37.5 MHz
-
38
-
µA/rad
38 MHz to 45.5 MHz
-
47
-
µA/rad
46 MHz to 53.5 MHz
-
61
-
µA/rad
57 MHz
-
61
-
µA/rad
Io(PD)
phase detector output
current
sink or source;
fVCO selection:
22 MHz to 29.5 MHz
-
200
-
µA
30 MHz to 37.5 MHz
-
238
-
µA
38 MHz to 45.5 MHz
-
294
-
µA
46 MHz to 53.5 MHz
-
384
-
µA
57 MHz
-
384
-
µA
ϕn(synth)
synthesizer phase noise
with 4 MHz crystal
oscillator reference;
fsynth = 31 MHz;
fIF =36MHz
at 1 kHz
[3] 89
99
-
dBc/Hz
at 10 kHz
[3] 89
99
-
dBc/Hz
at 100 kHz
[3] 98
102
-
dBc/Hz
at 1.4 MHz
[3] 115
119
-
dBc/Hz
αsp
spurious suppression
multiple of
∆f = 500 kHz
[3] 50
-
-
dBc
IL
leakage current
synthesizer spurious
performance > 50 dBc
[3] -
-
10
nA
Table 53.
Characteristics …continued
VP =5V; Tamb =25 °C; see Table 24 for input frequencies; B/G standard is used for the specification (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50
Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); measurements taken in test circuit of Figure 51; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit



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