TDA9898HLSLASHV3 datasheet(82/103 Pages) NXP

82 / 103 page

TDA9897_TDA9898_4

Product data sheet

Rev. 04 — 25 May 2009

82 of 103

NXP Semiconductors

TDA9897; TDA9898

Multistandard hybrid IF processing

Isource(o)PD(max)

maximum phase

detector output

source current

--65

µA

Conversion synthesizer PLL; pin LFSYN2

VLFSYN2

voltage on pin

LFSYN2

VCO steepness

∆f

VCO / ∆VLFSYN2

MHz/V

phase detector

steepness

∆I

LFSYN2 / ∆ϕVCO;

see Table 57;

fVCO selection:

22 MHz to 29.5 MHz

µA/rad

30 MHz to 37.5 MHz

µA/rad

38 MHz to 45.5 MHz

µA/rad

46 MHz to 53.5 MHz

µA/rad

57 MHz

µA/rad

Io(PD)

phase detector output

current

sink or source;

fVCO selection:

22 MHz to 29.5 MHz

200

µA

30 MHz to 37.5 MHz

238

µA

38 MHz to 45.5 MHz

294

µA

46 MHz to 53.5 MHz

384

µA

57 MHz

384

µA

ϕn(synth)

synthesizer phase

noise

fsynth = 31 MHz;

fIF =36MHz

at 1 kHz

[2] 89

dBc/Hz

at 10 kHz

[2] 89

dBc/Hz

at 100 kHz

[2] 98

102

dBc/Hz

at 1.4 MHz

[2] 115

119

dBc/Hz

fsynth = 40 MHz;

fIF = 44 MHz; external

4 MHz reference signal of

265 mV (RMS) and phase

noise better than

120 dBc/Hz; see Figure 46

at 1 kHz

[2] 89

dBc/Hz

at 10 kHz

[2] 89

100

dBc/Hz

at 100 kHz

[2] 96

100

dBc/Hz

at 1.4 MHz

[2] 115

118

dBc/Hz

αsp

spurious suppression

multiple of

∆f = 500 kHz

[2] 50

dBc

leakage current

synthesizer spurious

performance > 50 dBc

[2] --10

Table 56.

Characteristics …continued

VP =5V[1]; Tamb =25 °C; 8 MHz system; see Table 33 and Table 34; CW test input signal is used for speciﬁcation;

Vi(IF) = 10 mV (RMS); fIF = 36 MHz for low IF output of 5 MHz; IF input from 50 Ω via broadband transformer 1 : 1;

gain controlled ampliﬁer adjusted to typical speciﬁed output level; measurements taken in test circuit of Figure 51 with 4 MHz

crystal oscillator reference; unless otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

TDA9898HL/V3 Datasheet(PDF) 82 Page - NXP Semiconductors

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