TDA9898HLSLASHV3 datasheet(48/103 Pages) NXP

48 / 103 page

TDA9897_TDA9898_4

Product data sheet

Rev. 04 — 25 May 2009

48 of 103

NXP Semiconductors

TDA9897; TDA9898

Multistandard hybrid IF processing

TAGC loop based on VIF AGC (W6[7:6] = 11); TAGC is voltage output; applicable for TV mode: positive modulation and

optional for negative modulation); see Table 47, Figure 13 and Figure 14

Vi(IF)(RMS)

RMS IF input voltage

for TOP2; at starting point

of tuner AGC takeover;

VTAGC = 3.5 V

RTOP2 =22kΩ or

W10[5:0] = 00 0000

56.9

µV

RTOP2 =10kΩ or

W10[5:0] = 01 0000

78.5

µV

RTOP2 =0kΩ

-98

µV

W10[5:0] = 01 1111

µV

αacc(set)TOP2

TOP2 setting accuracy

−8

∆αacc(set)TOP2/∆T TOP2 setting accuracy

variation with temperature

VTAGC = 3.5 V

0.03

0.07

dB/K

output voltage

no tuner gain reduction

4.5

maximum tuner gain

reduction

0.2

0.6

∆Gslip(TAGC)

TAGC slip gain offset

tuner gain voltage from

0.6 V to 3.5 V

8dB

TOP adjust 2; pin TOP2; IF based TAGC loop mode; see Figure 14

VTOP2

voltage on pin TOP2 (DC)

pin open-circuit

3.5

input resistance

Ω

RTOP2

resistance on pin TOP2

adjustment of VIF AGC

based TAGC loop

W10[5] = 1; external

resistor operation

Ω

W10[5] = 0; forced

I2C-bus operation

100

Ω

Pin CTAGC

VCTAGC

voltage on pin CTAGC

[3] 0.2

0.55VP

leakage current

sink or source

[3] -

output resistance

equivalent time constant

resistance

[3] -10

Ω

Pin MPP output characteristic

General

Vsat(u)

upper saturation voltage

VP − 0.8 VP − 0.5

Vsat(l)

lower saturation voltage

0.5

0.8

Io(max)

maximum output current

sink or source

[3] 350

µA

output resistance

[3] -

1.3

Ω

Table 53.

Characteristics …continued

VP =5V; Tamb =25 °C; see Table 24 for input frequencies; B/G standard is used for the speciﬁcation (fPC = 38.375 MHz;

fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level

for L); IF input from 50

Ω via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for

B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;

internal Nyquist slope switched on (W7[0] = 0); measurements taken in test circuit of Figure 51; unless otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

TDA9898HL/V3 Datasheet(PDF) 48 Page - NXP Semiconductors

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