33874 datasheet(10/38 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

33874

ELECTRICAL CHARACTERISTICS

DYNAMIC ELECTRICAL CHARACTERISTICS

Table 4. Dynamic Electrical Characteristics

Characteristics noted under conditions 6.0V

≤ VPWR ≤ 27V, 4.5V ≤ VDD ≤ 5.5V, -40°C ≤ TA ≤ 125°C, GND = 0V, unless

otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless

otherwise noted.

Characteristic

Symbol

Min

Typ

Max

Unit

POWER OUTPUT TIMING (HS0, HS1, HS2, HS3)

Output Rising Slow Slew Rate A (DICR D3 = 0)(19)

9.0V < VPWR < 16V

SRRA_SLOW

0.1

0.3

0.75

μs

Output Rising Slow Slew Rate B (DICR D3 = 0)(20)

9.0V < VPWR < 16V

SRRB_SLOW

0.015

0.05

0.15

μs

Output Rising Fast Slew Rate A (DICR D3 = 1)(19)

9.0V < VPWR < 16V

SRRA_FAST

0.5

1.5

3.0

μs

Output Rising Fast Slew Rate B (DICR D3 = 1)(20)

9.0V < VPWR < 16V

SRRB_FAST

0.025

0.3

1.0

μs

Output Falling Slow Slew Rate A (DICR D3 = 0)(19)

9.0V < VPWR < 16V

SRFA_SLOW

0.1

0.3

0.75

μs

Output Falling Slow Slew Rate B (DICR D3 = 0)(20)

9.0V < VPWR < 16V

SRFB_SLOW

0.015

0.05

0.15

μs

Output Falling Fast Slew Rate A (DICR D3 = 1)(19)

9.0V < VPWR < 16V

SRFA_FAST

0.5

1.5

3.0

μs

Output Falling Fast Slew Rate B (DICR D3 = 1)(20)

9.0V < VPWR < 16V

SRFB_FAST

0.025

0.3

1.0

μs

Output Turn-ON Delay Time in Slow Slew Rate(21)

DICR = 0

tDLY_SLOW(ON)

2.0

200

μs

Output Turn-ON Delay Time in Fast Slew Rate(21)

DICR = 1

tDLY_FAST(ON)

1.0

6.0

100

μs

Output Turn-OFF Delay Time in Slow Slew Rate Mode(22)

DICR = 0

tDLY_SLOW(OF

200

800

μs

Output Turn-OFF Delay Time in Fast Slew Rate Mode(22)

DICR = 1

tDLY_FAST(OFF)

400

μs

Over-current Low Detection Blanking Time

OCLT[1:0]: 00

OCLT[1:0]: 01(23)

OCLT[1:0]: 10

OCLT[1:0]: 11

tOCL0

tOCL1

tOCL2

tOCL3

108

–

0.08

155

–

0.15

202

–

0.3

Notes

19.

Rise and Fall Slew Rates A measured across a 5.0

Ω resistive load at high side output = 0.5V to VPWR -3.5V (see Figure 4, page 12).

These parameters are guaranteed by process monitoring.

20.

Rise and Fall Slew Rates B measured across a 5.0

Ω resistive load at high side output = 0.5V to VPWR -3.5V (see Figure 4). These

parameters are guaranteed by process monitoring.

21.

Turn-ON delay time measured from rising edge of any signal (IN[0:3], SCLK, CS) that would turn the output ON to VHS[0:3] = 0.5V with

RL = 5.0Ω resistive load.

22.

Turn-OFF delay time measured from falling edge of any signal (IN[0:3], SCLK, CS) that would turn the output OFF to VHS[0:3] = VPWR-

0.5V with RL = 5.0Ω resistive load.

23.

This logical bit is not defined. Do not use.

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